[llvm-branch-commits] [clang] dcc9a96 - [SiFive][RISCV] Add SiFive extension support

[via llvm-branch-commits]

Author: Kito Cheng
Date: 2022-11-14T23:51:19-08:00
New Revision: dcc9a96ded6c3b6327975556b685d7562bc4827f

URL: https://github.com/llvm/llvm-project/commit/dcc9a96ded6c3b6327975556b685d7562bc4827f
DIFF: https://github.com/llvm/llvm-project/commit/dcc9a96ded6c3b6327975556b685d7562bc4827f.diff

LOG: [SiFive][RISCV] Add SiFive extension support

Added: 
    

Modified: 
    clang/include/clang/Support/RISCVVIntrinsicUtils.h
    clang/lib/Sema/SemaRISCVVectorLookup.cpp
    clang/utils/TableGen/RISCVVEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Support/RISCVVIntrinsicUtils.h b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
index 4a8bbc78cdee3..a0df9af0e941c 100644
--- a/clang/include/clang/Support/RISCVVIntrinsicUtils.h
+++ b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
@@ -398,8 +398,9 @@ enum RVVRequire : uint8_t {
   RVV_REQ_None = 0,
   RVV_REQ_RV64 = 1 << 0,
   RVV_REQ_FullMultiply = 1 << 1,
+  RVV_REQ_xsfvcp = 1 << 2,
 
-  LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_FullMultiply)
+  LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_xsfvcp)
 };
 
 // Raw RVV intrinsic info, used to expand later.

diff  --git a/clang/lib/Sema/SemaRISCVVectorLookup.cpp b/clang/lib/Sema/SemaRISCVVectorLookup.cpp
index 4ab393b89d1b9..4b27d72e8a276 100644
--- a/clang/lib/Sema/SemaRISCVVectorLookup.cpp
+++ b/clang/lib/Sema/SemaRISCVVectorLookup.cpp
@@ -93,6 +93,9 @@ static QualType RVVType2Qual(ASTContext &Context, const RVVType *Type) {
   case ScalarTypeKind::SignedInteger:
     QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), true);
     break;
+  case ScalarTypeKind::SignedInteger32:
+    QT = Context.getIntTypeForBitwidth(32, true);
+    break;
   case ScalarTypeKind::UnsignedInteger:
     QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), false);
     break;

diff  --git a/clang/utils/TableGen/RISCVVEmitter.cpp b/clang/utils/TableGen/RISCVVEmitter.cpp
index 84f0420d7c331..ca97e736c1166 100644
--- a/clang/utils/TableGen/RISCVVEmitter.cpp
+++ b/clang/utils/TableGen/RISCVVEmitter.cpp
@@ -644,6 +644,7 @@ void RVVEmitter::createRVVIntrinsics(
       RVVRequire RequireExt = StringSwitch<RVVRequire>(RequiredFeature)
                                   .Case("RV64", RVV_REQ_RV64)
                                   .Case("FullMultiply", RVV_REQ_FullMultiply)
+                                  .Case("Xsfvcp", RVV_REQ_xsfvcp)
                                   .Default(RVV_REQ_None);
       assert(RequireExt != RVV_REQ_None && "Unrecognized required feature?");
       SR.RequiredExtensions |= RequireExt;