[llvm-branch-commits] [libunwind] b3e9abd - [libunwind] Further fix for 32-bit PowerPC processors without AltiVec

[Tom Stellard via llvm-branch-commits]

Author: George Koehler
Date: 2022-02-28T21:08:16-08:00
New Revision: b3e9abd9683b11e81b7711fd654157b6b81b0509

URL: https://github.com/llvm/llvm-project/commit/b3e9abd9683b11e81b7711fd654157b6b81b0509
DIFF: https://github.com/llvm/llvm-project/commit/b3e9abd9683b11e81b7711fd654157b6b81b0509.diff

LOG: [libunwind] Further fix for 32-bit PowerPC processors without AltiVec

https://reviews.llvm.org/D91906 did most of the work necessary to fix libunwind on
32-bit PowerPC processors without AltiVec, but there was one more piece necessary.

Reviewed By: luporl

Differential Revision: https://reviews.llvm.org/D120197

(cherry picked from commit 3fa2e66c10aadac1d209afadba34d90c9bd95221)

Added: 
    

Modified: 
    libunwind/src/UnwindRegistersSave.S

Removed: 
    


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diff  --git a/libunwind/src/UnwindRegistersSave.S b/libunwind/src/UnwindRegistersSave.S
index 9566bb0335fee..b39489235ce63 100644
--- a/libunwind/src/UnwindRegistersSave.S
+++ b/libunwind/src/UnwindRegistersSave.S
@@ -603,9 +603,11 @@ DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
   stw     30,128(3)
   stw     31,132(3)
 
+#if defined(__ALTIVEC__)
   // save VRSave register
   mfspr   0, 256
   stw     0, 156(3)
+#endif
   // save CR registers
   mfcr    0
   stw     0, 136(3)