[llvm-branch-commits] [clang] 63b9186 - [PowerPC] Store, load, move from and to registers related builtins
Albion Fung via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Jun 25 00:09:39 PDT 2021
Author: Albion Fung
Date: 2021-06-25T02:06:01-05:00
New Revision: 63b91860728beae25dfa38cee2a61679fa491887
URL: https://github.com/llvm/llvm-project/commit/63b91860728beae25dfa38cee2a61679fa491887
DIFF: https://github.com/llvm/llvm-project/commit/63b91860728beae25dfa38cee2a61679fa491887.diff
LOG: [PowerPC] Store, load, move from and to registers related builtins
This patch implements store, load, move from and to registers related
builtins. The patch aims to provide feature parady with xlC on AIX.
Added:
clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c
clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
Modified:
clang/include/clang/Basic/BuiltinsPPC.def
clang/lib/Basic/Targets/PPC.h
clang/lib/CodeGen/CGBuiltin.cpp
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def
index 9d7f765a2133..67fcd39b8568 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -45,6 +45,20 @@ BUILTIN(__builtin_ppc_dcbt, "vv*", "")
BUILTIN(__builtin_ppc_dcbtst, "vv*", "")
BUILTIN(__builtin_ppc_dcbz, "vv*", "")
BUILTIN(__builtin_ppc_icbt, "vv*", "")
+BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
+BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
+BUILTIN(__builtin_ppc_lharx, "isD*", "")
+BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
+BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
+BUILTIN(__builtin_ppc_sthcx, "isD*s", "")
+BUILTIN(__builtin_ppc_stbcx, "icD*c", "")
+BUILTIN(__builtin_ppc_dcbtstt, "vv*s", "")
+BUILTIN(__builtin_ppc_dcbtt, "vv*c", "")
+BUILTIN(__builtin_ppc_mftbu, "Ui","")
+BUILTIN(__builtin_ppc_mfmsr, "ULi", "")
+BUILTIN(__builtin_ppc_mtmsr, "vULi", "")
+BUILTIN(__builtin_ppc_mtspr, "viC", "")
BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n")
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index 2ceb0b0cbf1c..f5c551a5df93 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -367,6 +367,14 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
Builder.defineMacro("__dcbtst", "__builtin_ppc_dcbtst");
Builder.defineMacro("__dcbz", "__builtin_ppc_dcbz");
Builder.defineMacro("__icbt", "__builtin_ppc_icbt");
+ Builder.defineMacro("__ldarx", "__builtin_ppc_ldarx");
+ Builder.defineMacro("__lwarx", "__builtin_ppc_lwarx");
+ Builder.defineMacro("__lharx", "__builtin_ppc_lharx");
+ Builder.defineMacro("__lbarx", "__builtin_ppc_lbarx");
+ Builder.defineMacro("__stdcx", "__builtin_ppc_stdcx");
+ Builder.defineMacro("__stwcx", "__builtin_ppc_stwcx");
+ Builder.defineMacro("__sthcx", "__builtin_ppc_sthcx");
+ Builder.defineMacro("__stbcx", "__builtin_ppc_stbcx");
}
};
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 1b30d44937f3..ddd5605acaba 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15342,6 +15342,28 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
return Builder.CreateExtractElement(Unpacked, Index);
}
+ case PPC::BI__builtin_ppc_sthcx: {
+ llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_sthcx);
+ Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy);
+ Ops[1] = Builder.CreateSExt(Ops[1], Int32Ty);
+ return Builder.CreateCall(F, Ops);
+ }
+ case PPC::BI__builtin_ppc_stbcx: {
+ llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_stbcx);
+ Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy);
+ auto Signed = getIntegerWidthAndSignedness(CGM.getContext(),
+ E->getArg(1)->getType()).Signed;
+
+ if (Signed) {
+ dbgs() << "SIGNED\n";
+ Ops[1] = Builder.CreateSExt(Ops[1], Int32Ty);
+ } else {
+ dbgs() << "UNSIGNED\n";
+ Ops[1] = Builder.CreateZExt(Ops[1], Int32Ty);
+ }
+ return Builder.CreateCall(F, Ops);
+ }
+
// The PPC MMA builtins take a pointer to a __vector_quad as an argument.
// Some of the MMA instructions accumulate their result into an existing
// accumulator whereas the others generate a new accumulator. So we need to
diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c
new file mode 100644
index 000000000000..0de55393c43a
--- /dev/null
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c
@@ -0,0 +1,14 @@
+// RUN: %clang -c -O2 -S -mcpu=pwr8 %s -o - | \
+// RUN: FileCheck %s
+long test_ldarx(volatile long* a) {
+ // CHECK-LABEL: test_ldarx
+ // CHECK: ldarx 3, 0, 3
+ // CHECK-NEXT: blr
+ return __ldarx(a);
+}
+
+int test_stdcx(volatile long* addr, long val) {
+ // CHECK-LABEL: test_stdcx
+ // CHECK: stdcx. 3, 0, 4
+ return __stdcx(addr, val);
+}
diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
new file mode 100644
index 000000000000..ba29d8986564
--- /dev/null
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
@@ -0,0 +1,76 @@
+// RUN: %clang_cc1 -triple=powerpc-unknown-aix -O2 -S %s -o - | \
+// RUN: FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple=powerpc64-unknown-aix -O2 -S %s -o - | \
+// RUN: FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple=powerpc64le-unknown-unknown -O2 -S %s \
+// RUN: -o - | FileCheck %s --check-prefix=CHECK-COMMON
+// RUN: %clang_cc1 -triple=powerpc64be-unknown-unknown -O2 -S %s \
+// RUN: -o - | FileCheck %s --check-prefix=CHECK-COMMON
+
+int test_lwarx(volatile int* a) {
+ // CHECK-COMMON-LABEL: test_lwarx
+ // CHECK-COMMON: lwarx 3, 0, 3
+ // CHECK-COMMON-NEXT: extsw 3, 3
+ // CHECK-COMMON-NEXT: blr
+
+ // CHECK-AIX-LABEL: test_lwarx
+ // CHECK-AIX: lwarx 3, 0, 3
+ // CHECK-AIX-NEXT: blr
+ return __lwarx(a);
+}
+
+short test_lharx(volatile short* a) {
+ // CHECK-COMMON-LABEL: test_lharx
+ // CHECK-COMMON: lharx 3, 0, 3
+ // CHECK-COMMON-NEXT: extsh 3, 3
+ // CHECK-COMMON-NEXT: blr
+
+ // CHECK-AIX-LABEL: test_lharx
+ // CHECK-AIX: lharx 3, 0, 3
+ // CHECK-AIX-NEXT: extsh 3, 3
+ // CHECK-AIX-NEXT: blr
+ return __lharx(a);
+}
+
+char test_lbarx(volatile unsigned char* a) {
+ // CHECK-COMMON-LABEL: test_lbarx
+ // CHECK-COMMON: lbarx 3, 0, 3
+ // CHECK-COMMON-NEXT: clrldi 3, 3, 56
+ // CHECK-COMMON-NEXT: blr
+
+ // CHECK-AIX-LABEL: test_lbarx
+ // CHECK-AIX: lbarx 3, 0, 3
+ // CHECK-AIX-NEXT: extsb 3, 3
+ // CHECK-AIX-NEXT: blr
+ return __lbarx(a);
+}
+
+int test_stwcx(volatile int* a, int val) {
+ // CHECK-COMMON-LABEL: test_stwcx
+ // CHECK-COMMON: stwcx. 4, 0, 3
+
+ // CHECK-AIX-LABEL: test_stwcx
+ // CHECK-AIX: stwcx. 4, 0, 3
+
+ return __stwcx(a, val);
+}
+
+int test_sthcx(volatile short* a, short val) {
+ // CHECK-COMMON-LABEL: test_sthcx
+ // CHECK-COMMON: sthcx. 4, 0, 3
+
+ // CHECK-AIX-LABEL: test_sthcx
+ // CHECK-AIX: sthcx. 4, 0, 3
+
+ return __sthcx(a, val);
+}
+
+int test_stbcx(volatile char* a, char val) {
+ // CHECK-COMMON-LABEL: test_stbcx
+ // CHECK-COMMON: stbcx. 4, 0, 3
+
+ // CHECK-AIX-LABEL: test_stbcx
+ // CHECK-AIX: stbcx. 4, 0, 3
+
+ return __stbcx(a, val);
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index ca1055c0d0cb..0383bc2a8a96 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1523,5 +1523,19 @@ let TargetPrefix = "ppc" in {
Intrinsic<[],[],[]>;
def int_ppc_iospace_eieio : GCCBuiltin<"__builtin_ppc_iospace_eieio">,
Intrinsic<[],[],[]>;
+ def int_ppc_ldarx : GCCBuiltin<"__builtin_ppc_ldarx">,
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrNoMem]>;
+ def int_ppc_lwarx : GCCBuiltin<"__builtin_ppc_lwarx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>;
+ def int_ppc_lharx : GCCBuiltin<"__builtin_ppc_lharx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>;
+ def int_ppc_lbarx : GCCBuiltin<"__builtin_ppc_lbarx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>;
+ def int_ppc_stdcx : GCCBuiltin<"__builtin_ppc_stdcx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrWriteMem]>;
+ def int_ppc_stwcx : GCCBuiltin<"__builtin_ppc_stwcx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
+ def int_ppc_sthcx : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
+ def int_ppc_stbcx : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
index b183dbd4b3bb..d1514bbebe05 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -2836,3 +2836,22 @@ let Predicates = [IsISA3_1, HasVSX, IsBigEndian, IsPPC64] in {
def : Pat<(v2i64 (PPCvecinsertelt v2i64:$vDi, i64:$rA, (i64 i))),
(VINSD $vDi, !mul(i, 8), $rA)>;
}
+
+let Predicates = [HasP8Altivec] in {
+def : Pat<(int_ppc_ldarx xoaddr:$dst),
+ (LDARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stdcx xoaddr:$dst, g8rc:$A),
+ (STDCX g8rc:$A, xoaddr:$dst)>;
+}
+def : Pat<(int_ppc_lwarx xoaddr:$dst),
+ (LWARX xoaddr:$dst)>;
+def : Pat<(int_ppc_lharx xoaddr:$dst),
+ (LHARX xoaddr:$dst)>;
+def : Pat<(int_ppc_lbarx xoaddr:$dst),
+ (LBARX xoaddr:$dst)>;
+// def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+ // (STWCX gprc:$A, xoaddr:$dst)>;
+def : Pat<(int_ppc_sthcx xoaddr:$dst, gprc:$A),
+ (STHCX (EXTSH gprc:$A), xoaddr:$dst)>;
+def : Pat<(int_ppc_stbcx xoaddr:$dst, gprc:$A),
+ (STBCX gprc:$A, xoaddr:$dst)>;
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