[llvm-branch-commits] [clang] c1e1a4e - temp commit
Albion Fung via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Jun 23 11:53:46 PDT 2021
Author: Albion Fung
Date: 2021-06-23T13:53:36-05:00
New Revision: c1e1a4ee687e416d67c8520846269b18c45222c8
URL: https://github.com/llvm/llvm-project/commit/c1e1a4ee687e416d67c8520846269b18c45222c8
DIFF: https://github.com/llvm/llvm-project/commit/c1e1a4ee687e416d67c8520846269b18c45222c8.diff
LOG: temp commit
Added:
clang/test/CodeGen/builtins-ppc-xlcompat-error.c
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.ll
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll
Modified:
clang/lib/Sema/SemaChecking.cpp
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c
Removed:
################################################################################
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index c777a17d76679..1b20d228f4e17 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -3335,17 +3335,17 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
return SemaBuiltinConstantArgRange(TheCall, 2, 1, 31);
}
case PPC::BI__builtin_ppc_tdw: {
- return TI.getTypeWidth(TI.getIntPtrType()) == 64 &&
- SemaBuiltinConstantArgRange(TheCall, 2, 1, 31);
- }
- case PPC::BI__builtin_ppc_fcfid:
- case PPC::BI__builtin_ppc_fcfud:
- case PPC::BI__builtin_ppc_fctid:
- case PPC::BI__builtin_ppc_fctidz:
- case PPC::BI__builtin_ppc_fctudz:
- case PPC::BI__builtin_ppc_trapd: {
- return TI.getTypeWidth(TI.getIntPtrType()) == 64;
- }
+ // return TI.getTypeWidth(TI.getIntPtrType()) == 64 &&
+ return SemaBuiltinConstantArgRange(TheCall, 2, 1, 31);
+ }
+ // case PPC::BI__builtin_ppc_fcfid:
+ // case PPC::BI__builtin_ppc_fcfud:
+ // case PPC::BI__builtin_ppc_fctid:
+ // case PPC::BI__builtin_ppc_fctidz:
+ // case PPC::BI__builtin_ppc_fctudz:
+ // case PPC::BI__builtin_ppc_trapd: {
+ // TI.getTypeWidth(TI.getIntPtrType()) == 64;
+ // }
#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
case PPC::BI__builtin_##Name: \
return SemaBuiltinPPCMMACall(TheCall, Types);
diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-error.c b/clang/test/CodeGen/builtins-ppc-xlcompat-error.c
new file mode 100644
index 0000000000000..ecdb6d15240cf
--- /dev/null
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-error.c
@@ -0,0 +1,17 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -fsyntax-only \
+// RUN: -Wall -Werror -verify %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -fsyntax-only \
+// RUN: -Wall -Werror -verify %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -fsyntax-only \
+// RUN: -Wall -Werror -verify %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -fsyntax-only \
+// RUN: -Wall -Werror -verify %s
+
+long long lla, llb;
+int ia, ib;
+
+void test_trap(void) {
+ __tdw(lla, llb, 50); //expected-error {{argument value 50 is outside the valid range [1, 31]}}
+ __tw(ia, ib, 50); //expected-error {{argument value 50 is outside the valid range [1, 31]}}
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 87249e67c6827..7de234bbf025f 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -112,7 +112,7 @@ let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
: GCCBuiltin<"__builtin_vsx_scalar_insert_exp_qp">,
Intrinsic <[llvm_f128_ty], [llvm_f128_ty, llvm_i64_ty], [IntrNoMem]>;
- // xl compatibility
+ // Intrinsics defined to maintain XL compatibility
def int_ppc_tdw
: GCCBuiltin<"__builtin_ppc_tdw">,
Intrinsic <[], [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 7e52ce2702a8a..1995bbec2c21e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -1731,6 +1731,6 @@ def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, 31),
def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, i32:$IMM),
(TD $IMM, $A, $B)>;
-// trap, trapd
+// trapd
def : Pat<(int_ppc_trapd g8rc:$A),
(TDI 24, $A, 0)>;
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c
index 33cb493498ae7..b0dc7ede50623 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c
@@ -1,115 +1,108 @@
-// RUN: clang -mcpu=pwr9 -O2 -c -S %s -o - | FileCheck %s
-
-double a;
+// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-unknown \
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-unknown \
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -O2 -triple powerpc-unknown-aix \
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-aix \
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
double test_fcfid(double a) {
// CHECK-LABEL: test_fcfid
- // CHECK: xscvsxddp 1, 1
- // CHECK: blr
- return __builtin_ppc_fcfid(a);
+ // CHECK: double @llvm.ppc.fcfid(double %0)
+ return __fcfid(a);
}
double test_xl_fcfid(double a) {
// CHECK-LABEL: test_xl_fcfid
- // CHECK: xscvsxddp 1, 1
- // CHECK: blr
+ // CHECK-NEXT: entry:
+ // CHECK: double @llvm.ppc.fcfid(double %0)
return __fcfid(a);
}
double test_fcfud(double a) {
// CHECK-LABEL: test_fcfud
- // CHECK: xscvuxddp 1, 1
- // CHECK: blr
- return __builtin_ppc_fcfud(a);
+ // CHECK-NEXT: entry:
+ // CHECK: double @llvm.ppc.fcfud(double %0)
+ return __fcfud(a);
}
double test_xl_fcfud(double a) {
// CHECK-LABEL: test_xl_fcfud
- // CHECK: xscvuxddp 1, 1
- // CHECK: blr
+ // CHECK-NEXT: entry:
+ // CHECK: double @llvm.ppc.fcfud(double %0)
return __fcfud(a);
}
double test_fctid(double a) {
// CHECK-LABEL: test_fctid
- // CHECK: fctid 1, 1
- // CHECK: blr
- return __builtin_ppc_fctid(a);
+ // CHECK-NEXT: entry:
+ // CHECK: double @llvm.ppc.fctid(double %0)
+ return __fctid(a);
}
double test_xl_fctid(double a) {
// CHECK-LABEL: test_xl_fctid
// CHECK: fctid 1, 1
- // CHECK: blr
return __fctid(a);
}
double test_fctidz(double a) {
// CHECK-LABEL: test_fctidz
// CHECK: xscvdpsxds 1, 1
- // CHECK: blr
- return __builtin_ppc_fctidz(a);
+ return __fctidz(a);
}
double test_xl_fctidz(double a) {
// CHECK-LABEL: test_xl_fctidz
// CHECK: xscvdpsxds 1, 1
- // CHECK: blr
return __fctidz(a);
}
double test_fctiw(double a) {
// CHECK-LABEL: test_fctiw
// CHECK: fctiw 1, 1
- // CHECK: blr
- return __builtin_ppc_fctiw(a);
+ return __fctiw(a);
}
double test_xl_fctiw(double a) {
// CHECK-LABEL: test_xl_fctiw
// CHECK: fctiw 1, 1
- // CHECK: blr
return __fctiw(a);
}
double test_fctiwz(double a) {
// CHECK-LABEL: test_fctiwz
// CHECK: xscvdpsxws 1, 1
- // CHECK: blr
- return __builtin_ppc_fctiwz(a);
+ return __fctiwz(a);
}
double test_xl_fctiwz(double a) {
// CHECK-LABEL: test_xl_fctiwz
// CHECK: xscvdpsxws 1, 1
- // CHECK: blr
return __fctiwz(a);
}
double test_fctudz(double a) {
// CHECK-LABEL: test_fctudz
// CHECK: xscvdpuxds 1, 1
- // CHECK: blr
- return __builtin_ppc_fctudz(a);
+ return __fctudz(a);
}
double test_xl_fctudz(double a) {
// CHECK-LABEL: test_xl_fctudz
// CHECK: xscvdpuxds 1, 1
- // CHECK: blr
return __fctudz(a);
}
double test_fctuwz(double a) {
// CHECK-LABEL: test_fctuwz
// CHECK: xscvdpuxws 1, 1
- // CHECK: blr
- return __builtin_ppc_fctuwz(a);
+ return __fctuwz(a);
}
double test_xl_fctuwz(double a) {
// CHECK-LABEL: test_xl_fctuwz
// CHECK: xscvdpuxws 1, 1
- // CHECK: blr
return __fctuwz(a);
}
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.ll
new file mode 100644
index 0000000000000..f55f339a215af
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.ll
@@ -0,0 +1,72 @@
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
+
+double test_fcfid(double a) {
+ return __fcfid(a);
+}
+
+double test_xl_fcfid(double a) {
+ return __fcfid(a);
+}
+
+double test_fcfud(double a) {
+ return __fcfud(a);
+}
+
+double test_xl_fcfud(double a) {
+ return __fcfud(a);
+}
+
+double test_fctid(double a) {
+ return __fctid(a);
+}
+
+double test_xl_fctid(double a) {
+ return __fctid(a);
+}
+
+double test_fctidz(double a) {
+ return __fctidz(a);
+}
+
+double test_xl_fctidz(double a) {
+ return __fctidz(a);
+}
+
+double test_fctiw(double a) {
+ return __fctiw(a);
+}
+
+double test_xl_fctiw(double a) {
+ return __fctiw(a);
+}
+
+double test_fctiwz(double a) {
+ return __fctiwz(a);
+}
+
+double test_xl_fctiwz(double a) {
+ return __fctiwz(a);
+}
+
+double test_fctudz(double a) {
+ return __fctudz(a);
+}
+
+double test_xl_fctudz(double a) {
+ return __fctudz(a);
+}
+
+double test_fctuwz(double a) {
+ return __fctuwz(a);
+}
+
+double test_xl_fctuwz(double a) {
+ return __fctuwz(a);
+}
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c
index 7de9dcc453e30..4e1eeee6bce11 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c
@@ -8,7 +8,7 @@ void test_tdlgt(void) {
// CHECK: tdlgt
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 1);
+ __tdw(lla, llb, 1);
}
void test_xl_tdlgt(void) {
@@ -24,7 +24,7 @@ void test_tdllt(void) {
// CHECK: tdllt
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 2);
+ __tdw(lla, llb, 2);
}
void test_xl_tdllt(void) {
@@ -40,7 +40,7 @@ void test_tdne3(void) {
// CHECK: tdne
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 3);
+ __tdw(lla, llb, 3);
}
void test_xl_tdne3(void) {
@@ -56,7 +56,7 @@ void test_tdeq(void) {
// CHECK: tdeq
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 4);
+ __tdw(lla, llb, 4);
}
void test_xl_tdeq(void) {
@@ -72,7 +72,7 @@ void test_tdlge(void) {
// CHECK: tdlge
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 5);
+ __tdw(lla, llb, 5);
}
void test_xl_tdlge(void) {
@@ -88,7 +88,7 @@ void test_tdlle(void) {
// CHECK: tdlle
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 6);
+ __tdw(lla, llb, 6);
}
void test_xl_tdlle(void) {
@@ -104,7 +104,7 @@ void test_tdgt(void) {
// CHECK: tdgt
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 8);
+ __tdw(lla, llb, 8);
}
void test_xl_tdgt(void) {
@@ -120,7 +120,7 @@ void test_tdge(void) {
// CHECK: tdge
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 12);
+ __tdw(lla, llb, 12);
}
void test_xl_tdge(void) {
@@ -136,7 +136,7 @@ void test_tdlt(void) {
// CHECK: tdlt
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 16);
+ __tdw(lla, llb, 16);
}
void test_xl_tdlt(void) {
@@ -152,7 +152,7 @@ void test_tdle(void) {
// CHECK: tdle
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 20);
+ __tdw(lla, llb, 20);
}
void test_xl_tdle(void) {
@@ -168,7 +168,7 @@ void test_tdne24(void) {
// CHECK: tdne
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 24);
+ __tdw(lla, llb, 24);
}
void test_xl_tdne24(void) {
@@ -184,7 +184,7 @@ void test_tdeq31(void) {
// CHECK: tdeq
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 31);
+ __tdw(lla, llb, 31);
}
void test_xl_tdeq31(void) {
@@ -200,7 +200,7 @@ void test_td_no_match(void) {
// CHECK: td 13
// CHECK: blr
- __builtin_ppc_tdw(lla, llb, 13);
+ __tdw(lla, llb, 13);
}
void test_xl_td_no_match(void) {
@@ -222,5 +222,5 @@ void test_xl_trapd(void) {
// CHECK-LABEL: test_xl_trapd
// CHECK: tdnei 3, 0
// CHECK: blr
- __trapd(da);
+ __builtin_ppc_trapd(da);
}
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll
new file mode 100644
index 0000000000000..c75bdacf01094
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll
@@ -0,0 +1,234 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
+
+long long lla, llb;
+double da;
+
+void test_tdlgt(void) {
+// CHECK-LABEL: test_tdlgt
+// CHECK: tdlgt
+// CHECK: blr
+
+ __tdw(lla, llb, 1);
+}
+
+void test_xl_tdlgt(void) {
+// CHECK-LABEL: test_xl_tdlgt
+// CHECK: tdlgt
+// CHECK: blr
+
+ __tdw(lla, llb, 1);
+}
+
+void test_tdllt(void) {
+// CHECK-LABEL: test_tdllt
+// CHECK: tdllt
+// CHECK: blr
+
+ __tdw(lla, llb, 2);
+}
+
+void test_xl_tdllt(void) {
+// CHECK-LABEL: test_xl_tdllt
+// CHECK: tdllt
+// CHECK: blr
+
+ __tdw(lla, llb, 2);
+}
+
+void test_tdne3(void) {
+// CHECK-LABEL: test_tdne3
+// CHECK: tdne
+// CHECK: blr
+
+ __tdw(lla, llb, 3);
+}
+
+void test_xl_tdne3(void) {
+// CHECK-LABEL: test_xl_tdne3
+// CHECK: tdne
+// CHECK: blr
+
+ __tdw(lla, llb, 3);
+}
+
+void test_tdeq(void) {
+// CHECK-LABEL: test_tdeq
+// CHECK: tdeq
+// CHECK: blr
+
+ __tdw(lla, llb, 4);
+}
+
+void test_xl_tdeq(void) {
+// CHECK-LABEL: test_xl_tdeq
+// CHECK: tdeq
+// CHECK: blr
+
+ __tdw(lla, llb, 4);
+}
+
+void test_tdlge(void) {
+// CHECK-LABEL: test_tdlge
+// CHECK: tdlge
+// CHECK: blr
+
+ __tdw(lla, llb, 5);
+}
+
+void test_xl_tdlge(void) {
+// CHECK-LABEL: test_xl_tdlge
+// CHECK: tdlge
+// CHECK: blr
+
+ __tdw(lla, llb, 5);
+}
+
+void test_tdlle(void) {
+// CHECK-LABEL: test_tdlle
+// CHECK: tdlle
+// CHECK: blr
+
+ __tdw(lla, llb, 6);
+}
+
+void test_xl_tdlle(void) {
+// CHECK-LABEL: test_xl_tdlle
+// CHECK: tdlle
+// CHECK: blr
+
+ __tdw(lla, llb, 6);
+}
+
+void test_tdgt(void) {
+// CHECK-LABEL: test_tdgt
+// CHECK: tdgt
+// CHECK: blr
+
+ __tdw(lla, llb, 8);
+}
+
+void test_xl_tdgt(void) {
+// CHECK-LABEL: test_xl_tdgt
+// CHECK: tdgt
+// CHECK: blr
+
+ __tdw(lla, llb, 8);
+}
+
+void test_tdge(void) {
+// CHECK-LABEL: test_tdge
+// CHECK: tdge
+// CHECK: blr
+
+ __tdw(lla, llb, 12);
+}
+
+void test_xl_tdge(void) {
+// CHECK-LABEL: test_xl_tdge
+// CHECK: tdge
+// CHECK: blr
+
+ __tdw(lla, llb, 12);
+}
+
+void test_tdlt(void) {
+// CHECK-LABEL: test_tdlt
+// CHECK: tdlt
+// CHECK: blr
+
+ __tdw(lla, llb, 16);
+}
+
+void test_xl_tdlt(void) {
+// CHECK-LABEL: test_xl_tdlt
+// CHECK: tdlt
+// CHECK: blr
+
+ __tdw(lla, llb, 16);
+}
+
+void test_tdle(void) {
+// CHECK-LABEL: test_tdle
+// CHECK: tdle
+// CHECK: blr
+
+ __tdw(lla, llb, 20);
+}
+
+void test_xl_tdle(void) {
+// CHECK-LABEL: test_xl_tdle
+// CHECK: tdle
+// CHECK: blr
+
+ __tdw(lla, llb, 20);
+}
+
+void test_tdne24(void) {
+// CHECK-LABEL: test_tdne24
+// CHECK: tdne
+// CHECK: blr
+
+ __tdw(lla, llb, 24);
+}
+
+void test_xl_tdne24(void) {
+// CHECK-LABEL: test_xl_tdne24
+// CHECK: tdne
+// CHECK: blr
+
+ __tdw(lla, llb, 24);
+}
+
+void test_tdeq31(void) {
+// CHECK-LABEL: test_tdeq31
+// CHECK: tdeq
+// CHECK: blr
+
+ __tdw(lla, llb, 31);
+}
+
+void test_xl_tdeq31(void) {
+// CHECK-LABEL: test_xl_tdeq31
+// CHECK: tdeq
+// CHECK: blr
+
+ __tdw(lla, llb, 31);
+}
+
+void test_td_no_match(void) {
+// CHECK-LABEL: test_td_no_match
+// CHECK: td 13
+// CHECK: blr
+
+ __tdw(lla, llb, 13);
+}
+
+void test_xl_td_no_match(void) {
+// CHECK-LABEL: test_xl_td_no_match
+// CHECK: td 13
+// CHECK: blr
+
+ __tdw(lla, llb, 13);
+}
+
+void test_trapd(void) {
+// CHECK-LABEL: test_trapd
+// CHECK: tdnei 3, 0
+// CHECK: blr
+ __builtin_ppc_trapd(da);
+}
+
+void test_xl_trapd(void) {
+// CHECK-LABEL: test_xl_trapd
+// CHECK: tdnei 3, 0
+// CHECK: blr
+ __builtin_ppc_trapd(da);
+}
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