[llvm-branch-commits] [clang] 15b07a4 - Complete stores
Albion Fung via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Jun 21 19:06:59 PDT 2021
Author: Albion Fung
Date: 2021-06-16T16:18:22-05:00
New Revision: 15b07a43deac3898c8496f6c4da6dbee88252751
URL: https://github.com/llvm/llvm-project/commit/15b07a43deac3898c8496f6c4da6dbee88252751
DIFF: https://github.com/llvm/llvm-project/commit/15b07a43deac3898c8496f6c4da6dbee88252751.diff
LOG: Complete stores
Added:
Modified:
clang/include/clang/Basic/BuiltinsPPC.def
clang/lib/Basic/Targets/PPC.h
clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c
clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def
index dbe816ac4678..2a8643c770f6 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -48,10 +48,10 @@ BUILTIN(__builtin_ppc_icbt, "vv*", "")
BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "icD*", "")
-BUILTIN(__builtin_ppc_stdcx, "iLiD*", "")
-BUILTIN(__builtin_ppc_stwcx, "iiD*", "")
-BUILTIN(__builtin_ppc_sthcx, "isD*Li", "")
+BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
+BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
+BUILTIN(__builtin_ppc_sthcx, "isD*i", "")
BUILTIN(__builtin_ppc_stbcx, "icD*i", "")
BUILTIN(__builtin_ppc_dcbtstt, "vv*s", "")
BUILTIN(__builtin_ppc_dcbtt, "vv*c", "")
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index 09d89f268882..f5c551a5df93 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -371,6 +371,10 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
Builder.defineMacro("__lwarx", "__builtin_ppc_lwarx");
Builder.defineMacro("__lharx", "__builtin_ppc_lharx");
Builder.defineMacro("__lbarx", "__builtin_ppc_lbarx");
+ Builder.defineMacro("__stdcx", "__builtin_ppc_stdcx");
+ Builder.defineMacro("__stwcx", "__builtin_ppc_stwcx");
+ Builder.defineMacro("__sthcx", "__builtin_ppc_sthcx");
+ Builder.defineMacro("__stbcx", "__builtin_ppc_stbcx");
}
};
diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c
index 1d8915c21bc3..0de55393c43a 100644
--- a/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore-64-only.c
@@ -6,3 +6,9 @@ long test_ldarx(volatile long* a) {
// CHECK-NEXT: blr
return __ldarx(a);
}
+
+int test_stdcx(volatile long* addr, long val) {
+ // CHECK-LABEL: test_stdcx
+ // CHECK: stdcx. 3, 0, 4
+ return __stdcx(addr, val);
+}
diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
index e32e5fcab91c..f4f02a01580f 100644
--- a/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
@@ -23,18 +23,50 @@ short test_lharx(volatile short* a) {
// CHECK-32-LABEL: test_lharx
// CHECK-32: lharx 3, 0, 3
+ // CHECK-32-NEXT: extsh 3, 3
// CHECK-32-NEXT: blr
return __lharx(a);
}
-char test_lbarx(volatile char* a) {
+char test_lbarx(volatile unsigned char* a) {
// CHECK-64-LABEL: test_lbarx
// CHECK-64: lbarx 3, 0, 3
// CHECK-64-NEXT: clrldi 3, 3, 56
// CHECK-64-NEXT: blr
// CHECK-32-LABEL: test_lbarx
- // CHECK-32: clrlwi 3, 3, 24
+ // CHECK-32: lbarx 3, 0, 3
+ // CHECK-32-NEXT: clrlwi 3, 3, 24
// CHECK-32-NEXT: blr
return __lbarx(a);
}
+
+int test_stwcx(volatile int* a, int val) {
+ // CHECK-64-LABEL: test_stwcx
+ // CHECK-64: stwcx. 4, 0, 3
+
+ // CHECK-32-LABEL: test_stwcx
+ // CHECK-32: stwcx. 4, 0, 3
+
+ return __stwcx(a, val);
+}
+
+int test_sthcx(volatile short* a, short val) {
+ // CHECK-64-LABEL: test_sthcx
+ // CHECK-64: sthcx. 4, 0, 3
+
+ // CHECK-32-LABEL: test_sthcx
+ // CHECK-32: sthcx. 4, 0, 3
+
+ return __sthcx(a, val);
+}
+
+int test_stbcx(volatile char* a, char val) {
+ // CHECK-64-LABEL: test_stbcx
+ // CHECK-64: stbcx. 4, 0, 3
+
+ // CHECK-32-LABEL: test_stbcx
+ // CHECK-32: stbcx. 4, 0, 3
+
+ return __stbcx(a, val);
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index fbb3750b6af7..ea5ca6181500 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1531,5 +1531,13 @@ let TargetPrefix = "ppc" in {
Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>;
def int_ppc_lbarx : GCCBuiltin<"__builtin_ppc_lbarx">,
Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>;
+ def int_ppc_stdcx : GCCBuiltin<"__builtin_ppc_stdcx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrWriteMem]>;
+ def int_ppc_stwcx : GCCBuiltin<"__builtin_ppc_stwcx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
+ def int_ppc_sthcx : GCCBuiltin<"__builtin_ppc_sthcx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
+ def int_ppc_stbcx : GCCBuiltin<"__builtin_ppc_stbcx">,
+ Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
index a2d024a4f93f..6f3f557cead0 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -2840,6 +2840,8 @@ let Predicates = [IsISA3_1, HasVSX, IsBigEndian, IsPPC64] in {
let Predicates = [HasP8Altivec] in {
def : Pat<(int_ppc_ldarx xoaddr:$dst),
(LDARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stdcx xoaddr:$dst, g8rc:$A),
+ (STDCX g8rc:$A, xoaddr:$dst)>;
}
def : Pat<(int_ppc_lwarx xoaddr:$dst),
(LWARX xoaddr:$dst)>;
@@ -2847,3 +2849,9 @@ def : Pat<(int_ppc_lharx xoaddr:$dst),
(LHARX xoaddr:$dst)>;
def : Pat<(int_ppc_lbarx xoaddr:$dst),
(LBARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+ (STWCX gprc:$A, xoaddr:$dst)>;
+def : Pat<(int_ppc_sthcx xoaddr:$dst, gprc:$A),
+ (STHCX gprc:$A, xoaddr:$dst)>;
+def : Pat<(int_ppc_stbcx xoaddr:$dst, gprc:$A),
+ (STBCX gprc:$A, xoaddr:$dst)>;
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