[llvm-branch-commits] [llvm] fec90b2 - Reland "[MC][ELF] Work around R_MIPS_LO16 relocation handling problem"

[Tom Stellard via llvm-branch-commits]

Author: Dimitry Andric
Date: 2021-06-08T16:15:38-07:00
New Revision: fec90b2cebc3d1bb7d9562bec5170d697db39a84

URL: https://github.com/llvm/llvm-project/commit/fec90b2cebc3d1bb7d9562bec5170d697db39a84
DIFF: https://github.com/llvm/llvm-project/commit/fec90b2cebc3d1bb7d9562bec5170d697db39a84.diff

LOG: Reland "[MC][ELF] Work around R_MIPS_LO16 relocation handling problem"

This fixes PR49821, and avoids "ld.lld: error: test.o:(.rodata.str1.1):
offset is outside the section" errors when linking MIPS objects with
negative R_MIPS_LO16 implicit addends.

ld.lld handles R_MIPS_HI16/R_MIPS_LO16 separately, not as a whole, so it
doesn't know that an R_MIPS_HI16 with implicit addend 1 and an
R_MIPS_LO16 with implicit addend -32768 represents 32768, which is in
range of a MergeInputSection. We could introduce a new RelExpr member
(like R_RISCV_PC_INDIRECT for R_RISCV_PCREL_HI20 / R_RISCV_PCREL_LO12)
but the complexity is unnecessary given that GNU as keeps the original
symbol for this case as well.

Adds a new test case for PR49821, and also updates two other test cases
that are affected by this change.

Reviewed By: atanasyan, MaskRay

Differential Revision: https://reviews.llvm.org/D101773

(cherry picked from commit 7e83a7f1fdfcc2edde61f0a535f9d7a56f531db9)

Added: 
    llvm/test/MC/Mips/mips_lo16.s

Modified: 
    llvm/lib/MC/ELFObjectWriter.cpp
    llvm/test/MC/Mips/elf-relsym.s
    llvm/test/MC/Mips/xgot.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp
index 69307b6175528..2d810ffd350b4 100644
--- a/llvm/lib/MC/ELFObjectWriter.cpp
+++ b/llvm/lib/MC/ELFObjectWriter.cpp
@@ -1397,6 +1397,17 @@ bool ELFObjectWriter::shouldRelocateWithSymbol(const MCAssembler &Asm,
       if (TargetObjectWriter->getEMachine() == ELF::EM_386 &&
           Type == ELF::R_386_GOTOFF)
         return true;
+
+      // ld.lld handles R_MIPS_HI16/R_MIPS_LO16 separately, not as a whole, so
+      // it doesn't know that an R_MIPS_HI16 with implicit addend 1 and an
+      // R_MIPS_LO16 with implicit addend -32768 represents 32768, which is in
+      // range of a MergeInputSection. We could introduce a new RelExpr member
+      // (like R_RISCV_PC_INDIRECT for R_RISCV_PCREL_HI20 / R_RISCV_PCREL_LO12)
+      // but the complexity is unnecessary given that GNU as keeps the original
+      // symbol for this case as well.
+      if (TargetObjectWriter->getEMachine() == ELF::EM_MIPS &&
+          !hasRelocationAddend())
+        return true;
     }
 
     // Most TLS relocations use a got, so they need the symbol. Even those that

diff  --git a/llvm/test/MC/Mips/elf-relsym.s b/llvm/test/MC/Mips/elf-relsym.s
index d19b4e3c48208..b8c2f89e82e6d 100644
--- a/llvm/test/MC/Mips/elf-relsym.s
+++ b/llvm/test/MC/Mips/elf-relsym.s
@@ -4,10 +4,16 @@
 
 // CHECK: Symbols [
 // CHECK:   Symbol {
-// CHECK:     Name: .rodata.cst8
+// CHECK:     Name: $.str
 // CHECK:   }
 // CHECK:   Symbol {
-// CHECK:     Name: .rodata.str1.1
+// CHECK:     Name: $.str1
+// CHECK:   }
+// CHECK:   Symbol {
+// CHECK:     Name: $CPI0_0
+// CHECK:   }
+// CHECK:   Symbol {
+// CHECK:     Name: $CPI0_1
 // CHECK:   }
 // CHECK: ]
 

diff  --git a/llvm/test/MC/Mips/mips_lo16.s b/llvm/test/MC/Mips/mips_lo16.s
new file mode 100644
index 0000000000000..a400f9206116f
--- /dev/null
+++ b/llvm/test/MC/Mips/mips_lo16.s
@@ -0,0 +1,22 @@
+# PR49821: Check that R_MIPS_LO16 relocs do not wrap around with large addends.
+
+# RUN: llvm-mc %s -triple mips-unknown-unknown -filetype=obj | \
+# RUN:	 llvm-objdump -d -r --no-show-raw-insn - | \
+# RUN:   FileCheck -check-prefix=MIPS32 %s
+
+# RUN: llvm-mc %s -triple mips64-unknown-unknown -filetype=obj | \
+# RUN:	 llvm-objdump -d -r --no-show-raw-insn - | \
+# RUN:   FileCheck -check-prefix=MIPS64 %s
+
+	.text
+foo:
+	lui	$2, %hi(bar)
+# MIPS32: 00000000:  R_MIPS_HI16  bar
+# MIPS64: 0000000000000000:  R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE	.rodata.str1.1+0x8000
+	addiu	$2, $2, %lo(bar)
+# MIPS32: 00000004:  R_MIPS_LO16  bar
+# MIPS64: 0000000000000004:  R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE	.rodata.str1.1+0x8000
+	.section	.rodata.str1.1,"aMS", at progbits,1
+	.zero 0x8000
+bar:
+	.asciz	"hello"

diff  --git a/llvm/test/MC/Mips/xgot.s b/llvm/test/MC/Mips/xgot.s
index 0c29582d681c8..100d25e67223b 100644
--- a/llvm/test/MC/Mips/xgot.s
+++ b/llvm/test/MC/Mips/xgot.s
@@ -10,8 +10,8 @@
 // CHECK:   0x1C R_MIPS_GOT_LO16 ext_1
 // CHECK:   0x24 R_MIPS_CALL_HI16 printf
 // CHECK:   0x30 R_MIPS_CALL_LO16 printf
-// CHECK:   0x2C R_MIPS_GOT16 .rodata.str1.1
-// CHECK:   0x38 R_MIPS_LO16 .rodata.str1.1
+// CHECK:   0x2C R_MIPS_GOT16 $.str
+// CHECK:   0x38 R_MIPS_LO16 $.str
 // CHECK: ]
 
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