[llvm-branch-commits] [llvm] 07b60d0 - [InstCombine] add tests for min/max intrinsics with extended values; NFC
Sanjay Patel via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Jan 25 05:03:05 PST 2021
Author: Sanjay Patel
Date: 2021-01-25T07:52:50-05:00
New Revision: 07b60d0060688dea121be36b46de859bafcec29b
URL: https://github.com/llvm/llvm-project/commit/07b60d0060688dea121be36b46de859bafcec29b
DIFF: https://github.com/llvm/llvm-project/commit/07b60d0060688dea121be36b46de859bafcec29b.diff
LOG: [InstCombine] add tests for min/max intrinsics with extended values; NFC
Added:
Modified:
llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll b/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
index 797f85d94447..bccfac81bdce 100644
--- a/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
@@ -5,6 +5,8 @@ declare i8 @llvm.umin.i8(i8, i8)
declare i8 @llvm.umax.i8(i8, i8)
declare i8 @llvm.smin.i8(i8, i8)
declare i8 @llvm.smax.i8(i8, i8)
+declare <3 x i8> @llvm.umin.v3i8(<3 x i8>, <3 x i8>)
+declare void @use(i8)
define i8 @umin_known_bits(i8 %x, i8 %y) {
; CHECK-LABEL: @umin_known_bits(
@@ -45,3 +47,154 @@ define i8 @smax_known_bits(i8 %x, i8 %y) {
%r = and i8 %m, -128
ret i8 %r
}
+
+define i8 @smax_sext(i5 %x, i5 %y) {
+; CHECK-LABEL: @smax_sext(
+; CHECK-NEXT: [[SX:%.*]] = sext i5 [[X:%.*]] to i8
+; CHECK-NEXT: [[SY:%.*]] = sext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.smax.i8(i8 [[SX]], i8 [[SY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %sx = sext i5 %x to i8
+ %sy = sext i5 %y to i8
+ %m = call i8 @llvm.smax.i8(i8 %sx, i8 %sy)
+ ret i8 %m
+}
+
+define i8 @smin_sext(i5 %x, i5 %y) {
+; CHECK-LABEL: @smin_sext(
+; CHECK-NEXT: [[SX:%.*]] = sext i5 [[X:%.*]] to i8
+; CHECK-NEXT: [[SY:%.*]] = sext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: call void @use(i8 [[SY]])
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.smin.i8(i8 [[SX]], i8 [[SY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %sx = sext i5 %x to i8
+ %sy = sext i5 %y to i8
+ call void @use(i8 %sy)
+ %m = call i8 @llvm.smin.i8(i8 %sx, i8 %sy)
+ ret i8 %m
+}
+
+define i8 @umax_sext(i5 %x, i5 %y) {
+; CHECK-LABEL: @umax_sext(
+; CHECK-NEXT: [[SX:%.*]] = sext i5 [[X:%.*]] to i8
+; CHECK-NEXT: call void @use(i8 [[SX]])
+; CHECK-NEXT: [[SY:%.*]] = sext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[SX]], i8 [[SY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %sx = sext i5 %x to i8
+ call void @use(i8 %sx)
+ %sy = sext i5 %y to i8
+ %m = call i8 @llvm.umax.i8(i8 %sx, i8 %sy)
+ ret i8 %m
+}
+
+define <3 x i8> @umin_sext(<3 x i5> %x, <3 x i5> %y) {
+; CHECK-LABEL: @umin_sext(
+; CHECK-NEXT: [[SX:%.*]] = sext <3 x i5> [[X:%.*]] to <3 x i8>
+; CHECK-NEXT: [[SY:%.*]] = sext <3 x i5> [[Y:%.*]] to <3 x i8>
+; CHECK-NEXT: [[M:%.*]] = call <3 x i8> @llvm.umin.v3i8(<3 x i8> [[SX]], <3 x i8> [[SY]])
+; CHECK-NEXT: ret <3 x i8> [[M]]
+;
+ %sx = sext <3 x i5> %x to <3 x i8>
+ %sy = sext <3 x i5> %y to <3 x i8>
+ %m = call <3 x i8> @llvm.umin.v3i8(<3 x i8> %sx, <3 x i8> %sy)
+ ret <3 x i8> %m
+}
+
+define i8 @smax_zext(i5 %x, i5 %y) {
+; CHECK-LABEL: @smax_zext(
+; CHECK-NEXT: [[ZX:%.*]] = zext i5 [[X:%.*]] to i8
+; CHECK-NEXT: [[ZY:%.*]] = zext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.smax.i8(i8 [[ZX]], i8 [[ZY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %zx = zext i5 %x to i8
+ %zy = zext i5 %y to i8
+ %m = call i8 @llvm.smax.i8(i8 %zx, i8 %zy)
+ ret i8 %m
+}
+
+define i8 @smin_zext(i5 %x, i5 %y) {
+; CHECK-LABEL: @smin_zext(
+; CHECK-NEXT: [[ZX:%.*]] = zext i5 [[X:%.*]] to i8
+; CHECK-NEXT: [[ZY:%.*]] = zext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.smin.i8(i8 [[ZX]], i8 [[ZY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %zx = zext i5 %x to i8
+ %zy = zext i5 %y to i8
+ %m = call i8 @llvm.smin.i8(i8 %zx, i8 %zy)
+ ret i8 %m
+}
+
+define i8 @umax_zext(i5 %x, i5 %y) {
+; CHECK-LABEL: @umax_zext(
+; CHECK-NEXT: [[ZX:%.*]] = zext i5 [[X:%.*]] to i8
+; CHECK-NEXT: [[ZY:%.*]] = zext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[ZX]], i8 [[ZY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %zx = zext i5 %x to i8
+ %zy = zext i5 %y to i8
+ %m = call i8 @llvm.umax.i8(i8 %zx, i8 %zy)
+ ret i8 %m
+}
+
+define i8 @umin_zext(i5 %x, i5 %y) {
+; CHECK-LABEL: @umin_zext(
+; CHECK-NEXT: [[ZX:%.*]] = zext i5 [[X:%.*]] to i8
+; CHECK-NEXT: [[ZY:%.*]] = zext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umin.i8(i8 [[ZX]], i8 [[ZY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %zx = zext i5 %x to i8
+ %zy = zext i5 %y to i8
+ %m = call i8 @llvm.umin.i8(i8 %zx, i8 %zy)
+ ret i8 %m
+}
+
+define i8 @umin_zext_types(i6 %x, i5 %y) {
+; CHECK-LABEL: @umin_zext_types(
+; CHECK-NEXT: [[ZX:%.*]] = zext i6 [[X:%.*]] to i8
+; CHECK-NEXT: [[ZY:%.*]] = zext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umin.i8(i8 [[ZX]], i8 [[ZY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %zx = zext i6 %x to i8
+ %zy = zext i5 %y to i8
+ %m = call i8 @llvm.umin.i8(i8 %zx, i8 %zy)
+ ret i8 %m
+}
+
+define i8 @umin_ext(i5 %x, i5 %y) {
+; CHECK-LABEL: @umin_ext(
+; CHECK-NEXT: [[SX:%.*]] = sext i5 [[X:%.*]] to i8
+; CHECK-NEXT: [[ZY:%.*]] = zext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umin.i8(i8 [[SX]], i8 [[ZY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %sx = sext i5 %x to i8
+ %zy = zext i5 %y to i8
+ %m = call i8 @llvm.umin.i8(i8 %sx, i8 %zy)
+ ret i8 %m
+}
+
+define i8 @umin_zext_uses(i5 %x, i5 %y) {
+; CHECK-LABEL: @umin_zext_uses(
+; CHECK-NEXT: [[ZX:%.*]] = zext i5 [[X:%.*]] to i8
+; CHECK-NEXT: call void @use(i8 [[ZX]])
+; CHECK-NEXT: [[ZY:%.*]] = zext i5 [[Y:%.*]] to i8
+; CHECK-NEXT: call void @use(i8 [[ZY]])
+; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umin.i8(i8 [[ZX]], i8 [[ZY]])
+; CHECK-NEXT: ret i8 [[M]]
+;
+ %zx = zext i5 %x to i8
+ call void @use(i8 %zx)
+ %zy = zext i5 %y to i8
+ call void @use(i8 %zy)
+ %m = call i8 @llvm.umin.i8(i8 %zx, i8 %zy)
+ ret i8 %m
+}
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