[llvm-branch-commits] [clang] 018984a - [PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets

[Brad Smith via llvm-branch-commits]

Author: George Koehler
Date: 2021-01-23T00:13:36-05:00
New Revision: 018984ae6833fae107aa9c502ab5536efceca88e

URL: https://github.com/llvm/llvm-project/commit/018984ae6833fae107aa9c502ab5536efceca88e
DIFF: https://github.com/llvm/llvm-project/commit/018984ae6833fae107aa9c502ab5536efceca88e.diff

LOG: [PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets

In the PPC32 SVR4 ABI, a va_list has copies of registers from the function call.
va_arg looked in the wrong registers for (the pointer representation of) an
object in Objective-C, and for some types in C++. Fix va_arg to look in the
general-purpose registers, not the floating-point registers. Also fix va_arg
for some C++ types, like a member function pointer, that are aggregates for
the ABI.

Anthony Richardby found the problem in Objective-C. Eli Friedman suggested
part of this fix.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47921

Reviewed By: efriedma, nemanjai

Differential Revision: https://reviews.llvm.org/D90329

Added: 
    clang/test/CodeGenCXX/ppc32-varargs-method.cpp
    clang/test/CodeGenObjC/ppc32-varargs-id.m

Modified: 
    clang/lib/CodeGen/TargetInfo.cpp

Removed: 
    


################################################################################
diff  --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp
index 9a11a0720f3c..bcd24292ff41 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -4709,13 +4709,12 @@ Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList,
   // };
 
   bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
-  bool isInt =
-      Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
+  bool isInt = !Ty->isFloatingType();
   bool isF64 = Ty->isFloatingType() && getContext().getTypeSize(Ty) == 64;
 
   // All aggregates are passed indirectly?  That doesn't seem consistent
   // with the argument-lowering code.
-  bool isIndirect = Ty->isAggregateType();
+  bool isIndirect = isAggregateTypeForABI(Ty);
 
   CGBuilderTy &Builder = CGF.Builder;
 

diff  --git a/clang/test/CodeGenCXX/ppc32-varargs-method.cpp b/clang/test/CodeGenCXX/ppc32-varargs-method.cpp
new file mode 100644
index 000000000000..2295f0125a88
--- /dev/null
+++ b/clang/test/CodeGenCXX/ppc32-varargs-method.cpp
@@ -0,0 +1,20 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-openbsd -emit-llvm -o - %s | FileCheck %s
+
+#include <stdarg.h>
+
+class something;
+typedef void (something::*method)();
+
+method test(va_list ap) {
+  return va_arg(ap, method);
+}
+// CHECK: using_regs:
+// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4
+// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4
+// CHECK-NEXT: mul i8 %numUsedRegs, 4
+// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}}
+// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to { i32, i32 }**
+// CHECK-NEXT: add i8 %numUsedRegs, 1
+// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4
+// CHECK-NEXT: br label %cont

diff  --git a/clang/test/CodeGenObjC/ppc32-varargs-id.m b/clang/test/CodeGenObjC/ppc32-varargs-id.m
new file mode 100644
index 000000000000..3730efb02d28
--- /dev/null
+++ b/clang/test/CodeGenObjC/ppc32-varargs-id.m
@@ -0,0 +1,33 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-openbsd -fblocks -emit-llvm -o - %s | FileCheck %s
+
+#include <stdarg.h>
+
+id testObject(va_list ap) {
+  return va_arg(ap, id);
+}
+// CHECK: @testObject
+// CHECK: using_regs:
+// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4
+// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4
+// CHECK-NEXT: mul i8 %numUsedRegs, 4
+// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}}
+// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to i8**
+// CHECK-NEXT: add i8 %numUsedRegs, 1
+// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4
+// CHECK-NEXT: br label %cont
+
+typedef void (^block)(void);
+block testBlock(va_list ap) {
+  return va_arg(ap, block);
+}
+// CHECK: @testBlock
+// CHECK: using_regs:
+// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4
+// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4
+// CHECK-NEXT: mul i8 %numUsedRegs, 4
+// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}}
+// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to void ()**
+// CHECK-NEXT: add i8 %numUsedRegs, 1
+// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4
+// CHECK-NEXT: br label %cont