[llvm-branch-commits] [mlir] 2782049 - [MLIR][SPIRV] Add `SignedOp` trait.
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Tue Jan 19 08:45:36 PST 2021
Author: KareemErgawy-TomTom
Date: 2021-01-19T17:40:40+01:00
New Revision: 27820496a71d5f73950e0d57b5dead236304b4e7
URL: https://github.com/llvm/llvm-project/commit/27820496a71d5f73950e0d57b5dead236304b4e7
DIFF: https://github.com/llvm/llvm-project/commit/27820496a71d5f73950e0d57b5dead236304b4e7.diff
LOG: [MLIR][SPIRV] Add `SignedOp` trait.
This commit adds a new trait that can be attached to ops that have
signed semantics.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D94896
Added:
Modified:
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index 99b245563ca6..b211f69bb68e 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -3117,6 +3117,8 @@ def InModuleScope : PredOpTrait<
def UnsignedOp : NativeOpTrait<"spirv::UnsignedOp">;
+def SignedOp : NativeOpTrait<"spirv::SignedOp">;
+
def UsableInSpecConstantOp : NativeOpTrait<"spirv::UsableInSpecConstantOp">;
//===----------------------------------------------------------------------===//
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
index 446066ae067e..5e3bf0b9eccd 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
@@ -178,7 +178,8 @@ def SPV_BitFieldInsertOp : SPV_Op<"BitFieldInsert",
// -----
-def SPV_BitFieldSExtractOp : SPV_BitFieldExtractOp<"BitFieldSExtract", []> {
+def SPV_BitFieldSExtractOp : SPV_BitFieldExtractOp<"BitFieldSExtract",
+ [SignedOp]> {
let summary = "Extract a bit field from an object, with sign extension.";
let description = [{
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
index 931f16425fe2..e887292cc1fc 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
@@ -163,7 +163,10 @@ def SPV_ConvertFToUOp : SPV_CastOp<"ConvertFToU", SPV_Integer, SPV_Float, []> {
// -----
-def SPV_ConvertSToFOp : SPV_CastOp<"ConvertSToF", SPV_Float, SPV_Integer, []> {
+def SPV_ConvertSToFOp : SPV_CastOp<"ConvertSToF",
+ SPV_Float,
+ SPV_Integer,
+ [SignedOp]> {
let summary = [{
Convert value numerically from signed integer to floating point.
}];
@@ -270,7 +273,10 @@ def SPV_FConvertOp : SPV_CastOp<"FConvert",
// -----
-def SPV_SConvertOp : SPV_CastOp<"SConvert", SPV_Integer, SPV_Integer, [UsableInSpecConstantOp]> {
+def SPV_SConvertOp : SPV_CastOp<"SConvert",
+ SPV_Integer,
+ SPV_Integer,
+ [UsableInSpecConstantOp, SignedOp]> {
let summary = [{
Convert signed width. This is either a truncate or a sign extend.
}];
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
index b4c5662217c8..2e642fd2f3d2 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
@@ -690,7 +690,7 @@ def SPV_LogicalOrOp : SPV_LogicalBinaryOp<"LogicalOr",
def SPV_SGreaterThanOp : SPV_LogicalBinaryOp<"SGreaterThan",
SPV_Integer,
- [UsableInSpecConstantOp]> {
+ [UsableInSpecConstantOp, SignedOp]> {
let summary = [{
Signed-integer comparison if Operand 1 is greater than Operand 2.
}];
@@ -725,7 +725,8 @@ def SPV_SGreaterThanOp : SPV_LogicalBinaryOp<"SGreaterThan",
def SPV_SGreaterThanEqualOp : SPV_LogicalBinaryOp<"SGreaterThanEqual",
SPV_Integer,
- [UsableInSpecConstantOp]> {
+ [UsableInSpecConstantOp,
+ SignedOp]> {
let summary = [{
Signed-integer comparison if Operand 1 is greater than or equal to
Operand 2.
@@ -761,7 +762,7 @@ def SPV_SGreaterThanEqualOp : SPV_LogicalBinaryOp<"SGreaterThanEqual",
def SPV_SLessThanOp : SPV_LogicalBinaryOp<"SLessThan",
SPV_Integer,
- [UsableInSpecConstantOp]> {
+ [UsableInSpecConstantOp, SignedOp]> {
let summary = [{
Signed-integer comparison if Operand 1 is less than Operand 2.
}];
@@ -796,7 +797,8 @@ def SPV_SLessThanOp : SPV_LogicalBinaryOp<"SLessThan",
def SPV_SLessThanEqualOp : SPV_LogicalBinaryOp<"SLessThanEqual",
SPV_Integer,
- [UsableInSpecConstantOp]> {
+ [UsableInSpecConstantOp,
+ SignedOp]> {
let summary = [{
Signed-integer comparison if Operand 1 is less than or equal to Operand
2.
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
index 89eaf1d95e28..68f3ad3171a8 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
@@ -533,7 +533,9 @@ def SPV_GroupNonUniformIMulOp :
// -----
def SPV_GroupNonUniformSMaxOp :
- SPV_GroupNonUniformArithmeticOp<"GroupNonUniformSMax", SPV_Integer, []> {
+ SPV_GroupNonUniformArithmeticOp<"GroupNonUniformSMax",
+ SPV_Integer,
+ [SignedOp]> {
let summary = [{
A signed integer maximum group operation of all Value operands
contributed by active invocations in the group.
@@ -582,7 +584,9 @@ def SPV_GroupNonUniformSMaxOp :
// -----
def SPV_GroupNonUniformSMinOp :
- SPV_GroupNonUniformArithmeticOp<"GroupNonUniformSMin", SPV_Integer, []> {
+ SPV_GroupNonUniformArithmeticOp<"GroupNonUniformSMin",
+ SPV_Integer,
+ [SignedOp]> {
let summary = [{
A signed integer minimum group operation of all Value operands
contributed by active invocations in the group.
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h
index e3e78e51b32a..d0bbc1f7b6a0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h
@@ -23,6 +23,9 @@ namespace spirv {
template <typename ConcreteType>
class UnsignedOp : public TraitBase<ConcreteType, UnsignedOp> {};
+template <typename ConcreteType>
+class SignedOp : public TraitBase<ConcreteType, SignedOp> {};
+
/// A trait to mark ops that can be enclosed/wrapped in a
/// `SpecConstantOperation` op.
template <typename ConcreteType>
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