[llvm-branch-commits] [llvm] 5d431c3 - Revert "[RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results."

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-18T11:00:20-08:00
New Revision: 5d431c3d32c7736d74c6a9dfe4a9a43f183d880f

URL: https://github.com/llvm/llvm-project/commit/5d431c3d32c7736d74c6a9dfe4a9a43f183d880f
DIFF: https://github.com/llvm/llvm-project/commit/5d431c3d32c7736d74c6a9dfe4a9a43f183d880f.diff

LOG: Revert "[RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results."

This reverts commit 2c51bef76cbf0149101b9e7c7c658b4a58657929.

I seem to have messed up the check lines in the test.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Removed: 
    llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 54e460f9349c..529f3c6fd8e2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -6602,7 +6602,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
     EVT OverflowVT = MVT::i1;
     if (ResultVT.isVector())
       OverflowVT = EVT::getVectorVT(
-          *Context, OverflowVT, ResultVT.getVectorElementCount());
+          *Context, OverflowVT, ResultVT.getVectorNumElements());
 
     SDVTList VTs = DAG.getVTList(ResultVT, OverflowVT);
     setValue(&I, DAG.getNode(Op, sdl, VTs, Op1, Op2));

diff  --git a/llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
deleted file mode 100644
index a0495c001dfe..000000000000
--- a/llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s
-
-declare { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32>)
-
-define <vscale x 2 x i32> @saddo_nvx2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) {
-; CHECK-LABEL: foo:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    vsetvli a0, zero, e32,m1,ta,mu
-; CHECK-NEXT:    vmslt.vx v25, v17, zero
-; CHECK-NEXT:    vadd.vv v26, v16, v17
-; CHECK-NEXT:    vmslt.vv v27, v26, v16
-; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
-; CHECK-NEXT:    vmxor.mm v0, v25, v27
-; CHECK-NEXT:    vsetvli a0, zero, e32,m1,ta,mu
-; CHECK-NEXT:    vmerge.vim v16, v26, 0, v0
-; CHECK-NEXT:    ret
-  %a = call { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y)
-  %b = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 0
-  %c = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 1
-  %d = select <vscale x 2 x i1> %c, <vscale x 2 x i32> zeroinitializer, <vscale x 2 x i32> %b
-  ret <vscale x 2 x i32> %d
-}