[llvm-branch-commits] [llvm] 291ac7e - [AArch64] Revert back to Intrinsic<> for TME instructions.
Florian Hahn via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Jan 18 10:09:33 PST 2021
Author: Florian Hahn
Date: 2021-01-18T18:03:58Z
New Revision: 291ac7e622d542f8b25f74bc28051762edc90938
URL: https://github.com/llvm/llvm-project/commit/291ac7e622d542f8b25f74bc28051762edc90938
DIFF: https://github.com/llvm/llvm-project/commit/291ac7e622d542f8b25f74bc28051762edc90938.diff
LOG: [AArch64] Revert back to Intrinsic<> for TME instructions.
This patch reverts back to Intrinsic for the instructions for the
transactional memory extension, so nosync is not included.
Added:
Modified:
clang/test/CodeGen/aarch64-tme.cpp
llvm/include/llvm/IR/IntrinsicsAArch64.td
Removed:
################################################################################
diff --git a/clang/test/CodeGen/aarch64-tme.cpp b/clang/test/CodeGen/aarch64-tme.cpp
index 40a9ab3561ef..5004751cb300 100644
--- a/clang/test/CodeGen/aarch64-tme.cpp
+++ b/clang/test/CodeGen/aarch64-tme.cpp
@@ -38,5 +38,5 @@ extern "C" void arm_feature_tme_defined() {}
#endif
// CHECK: define{{.*}} void @arm_feature_tme_defined()
-// CHECK: attributes #1 = { nounwind }
+// CHECK: attributes #1 = { nounwind willreturn }
diff --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td
index 9de3e8d732dd..da3085171b19 100644
--- a/llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -811,16 +811,16 @@ def int_aarch64_stgp : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_i64_ty, llv
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
- DefaultAttrsIntrinsic<[llvm_i64_ty]>;
+ Intrinsic<[llvm_i64_ty], [], [IntrWillReturn]>;
-def int_aarch64_tcommit : GCCBuiltin<"__builtin_arm_tcommit">, DefaultAttrsIntrinsic<[]>;
+def int_aarch64_tcommit : GCCBuiltin<"__builtin_arm_tcommit">, Intrinsic<[], [], [IntrWillReturn]>;
def int_aarch64_tcancel : GCCBuiltin<"__builtin_arm_tcancel">,
- DefaultAttrsIntrinsic<[], [llvm_i64_ty], [ImmArg<ArgIndex<0>>]>;
+ Intrinsic<[], [llvm_i64_ty], [IntrWillReturn, ImmArg<ArgIndex<0>>]>;
def int_aarch64_ttest : GCCBuiltin<"__builtin_arm_ttest">,
- DefaultAttrsIntrinsic<[llvm_i64_ty], [],
- [IntrNoMem, IntrHasSideEffects]>;
+ Intrinsic<[llvm_i64_ty], [],
+ [IntrNoMem, IntrHasSideEffects, IntrWillReturn]>;
// Armv8.7-A load/store 64-byte intrinsics
defvar data512 = !listsplat(llvm_i64_ty, 8);
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