[llvm-branch-commits] [llvm] c1ab698 - [ARM] Remove LLC tests from transform/hardware loop tests.

[David Green via llvm-branch-commits]

Author: David Green
Date: 2021-01-16T18:30:21Z
New Revision: c1ab698dce8dd4e751e63142ebb333d5b90bb8dc

URL: https://github.com/llvm/llvm-project/commit/c1ab698dce8dd4e751e63142ebb333d5b90bb8dc
DIFF: https://github.com/llvm/llvm-project/commit/c1ab698dce8dd4e751e63142ebb333d5b90bb8dc.diff

LOG: [ARM] Remove LLC tests from transform/hardware loop tests.

We now have a lot of llc tests for hardware loops in CodeGen, which test
a larger variety of loops and are easier to maintain. This removes the
llc from mixed llc/opt tests.

Added: 
    

Modified: 
    llvm/test/Transforms/HardwareLoops/ARM/structure.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/HardwareLoops/ARM/structure.ll b/llvm/test/Transforms/HardwareLoops/ARM/structure.ll
index 480823fe7db8..f8ef14e2da4d 100644
--- a/llvm/test/Transforms/HardwareLoops/ARM/structure.ll
+++ b/llvm/test/Transforms/HardwareLoops/ARM/structure.ll
@@ -1,7 +1,5 @@
 ; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -hardware-loops %s -S -o - | \
 ; RUN:     FileCheck %s
-; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi %s -o - | \
-; RUN:     FileCheck %s --check-prefix=CHECK-LLC
 ; RUN: opt -mtriple=thumbv8.1m.main -loop-unroll -unroll-remainder=false -S < %s | \
 ; RUN:     llc -mtriple=thumbv8.1m.main | FileCheck %s --check-prefix=CHECK-UNROLL
 ; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -hardware-loops \
@@ -65,15 +63,6 @@ do.end:
 ; CHECK-NOT: [[LOOP_DEC1:%[^ ]+]] = call i1 @llvm.loop.decrement.i32(i32 1)
 ; CHECK-NOT: br i1 [[LOOP_DEC1]], label %while.cond1.preheader.us, label %while.end7
 
-; CHECK-LLC:      nested:
-; CHECK-LLC-NOT:    mov lr, r1
-; CHECK-LLC:        dls lr, r1
-; CHECK-LLC-NOT:    mov lr, r1
-; CHECK-LLC:      [[LOOP_HEADER:\.LBB[0-9._]+]]:
-; CHECK-LLC:        le lr, [[LOOP_HEADER]]
-; CHECK-LLC-NOT:    b [[LOOP_EXIT:\.LBB[0-9._]+]]
-; CHECK-LLC:      [[LOOP_EXIT:\.LBB[0-9._]+]]:
-
 define void @nested(i32* nocapture %A, i32 %N) {
 entry:
   %cmp20 = icmp eq i32 %N, 0
@@ -363,12 +352,6 @@ for.body:
 ; CHECK: call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
 ; CHECK: call i32 @llvm.loop.decrement.reg.i32(
 
-; CHECK-LLC-LABEL: unroll_inc_unsigned:
-; CHECK-LLC: wls lr, r3, [[EXIT:.LBB[0-9_]+]]
-; CHECK-LLC: [[HEADER:.LBB[0-9_]+]]:
-; CHECK-LLC: le lr, [[HEADER]]
-; CHECK-LLC-NEXT: [[EXIT]]:
-
 ; TODO: We should be able to support the unrolled loop body.
 ; CHECK-UNROLL-LABEL: unroll_inc_unsigned
 ; CHECK-UNROLL:     [[PREHEADER:.LBB[0-9_]+]]: @ %for.body.preheader
@@ -407,14 +390,6 @@ for.body:
 ; CHECK: call i32 @llvm.start.loop.iterations.i32(i32 %N)
 ; CHECK: call i32 @llvm.loop.decrement.reg.i32(
 
-; TODO: An unnecessary register is being held to hold COUNT, lr should just
-; be used instead.
-; CHECK-LLC-LABEL: unroll_dec_int:
-; CHECK-LLC: dls lr, r3
-; CHECK-LLC-NOT: mov lr, r3
-; CHECK-LLC: [[HEADER:.LBB[0-9_]+]]:
-; CHECK-LLC: le lr, [[HEADER]]
-
 ; CHECK-UNROLL-LABEL: unroll_dec_int:
 ; CHECK-UNROLL:         wls lr, {{.*}}, [[PROLOGUE_EXIT:.LBB[0-9_]+]]
 ; CHECK-UNROLL-NEXT: [[PROLOGUE:.LBB[0-9_]+]]: