[llvm-branch-commits] [llvm] 0f588ac - [PowerPC] Only use some extend mne if assembler is modern enough
Jinsong Ji via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Jan 14 13:07:21 PST 2021
Author: Jinsong Ji
Date: 2021-01-14T20:36:10Z
New Revision: 0f588ac03e15a204b68f0214dda2b9f67410ff62
URL: https://github.com/llvm/llvm-project/commit/0f588ac03e15a204b68f0214dda2b9f67410ff62
DIFF: https://github.com/llvm/llvm-project/commit/0f588ac03e15a204b68f0214dda2b9f67410ff62.diff
LOG: [PowerPC] Only use some extend mne if assembler is modern enough
Legacy AIX assembly might not support all extended mnes,
add one feature bit to control the generation in MC,
and avoid generating them by default on AIX.
Reviewed By: sfertile
Differential Revision: https://reviews.llvm.org/D94458
Added:
llvm/test/MC/PowerPC/modern-aix-as.s
Modified:
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index 7629fe565bfd..bf9c6feb541e 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -78,7 +78,17 @@ static MCRegisterInfo *createPPCMCRegisterInfo(const Triple &TT) {
static MCSubtargetInfo *createPPCMCSubtargetInfo(const Triple &TT,
StringRef CPU, StringRef FS) {
- return createPPCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
+ // Set some default feature to MC layer.
+ std::string FullFS = std::string(FS);
+
+ if (TT.isOSAIX()) {
+ if (!FullFS.empty())
+ FullFS = "+aix," + FullFS;
+ else
+ FullFS = "+aix";
+ }
+
+ return createPPCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FullFS);
}
static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index f60adecf65ee..1e6ded231585 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -57,6 +57,10 @@ def DirectivePwrFuture
def Feature64Bit : SubtargetFeature<"64bit","Has64BitSupport", "true",
"Enable 64-bit instructions">;
+def AIXOS: SubtargetFeature<"aix", "IsAIX", "true", "AIX OS">;
+def FeatureModernAIXAs
+ : SubtargetFeature<"modern-aix-as", "HasModernAIXAs", "true",
+ "AIX system assembler is modern enough to support new mnes">;
def FeatureHardFloat : SubtargetFeature<"hard-float", "HasHardFloat", "true",
"Enable floating-point instructions">;
def Feature64BitRegs : SubtargetFeature<"64bitregs","Use64BitRegs", "true",
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index e19ea6a07a0d..03e9d6970a30 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -987,8 +987,11 @@ def : InstAlias<"cntlzw. $rA, $rS", (CNTLZW8_rec g8rc:$rA, g8rc:$rS)>;
def : InstAlias<"mtxer $Rx", (MTSPR8 1, g8rc:$Rx)>;
def : InstAlias<"mfxer $Rx", (MFSPR8 g8rc:$Rx, 1)>;
-def : InstAlias<"mtudscr $Rx", (MTSPR8 3, g8rc:$Rx)>;
-def : InstAlias<"mfudscr $Rx", (MFSPR8 g8rc:$Rx, 3)>;
+//Disable this alias on AIX for now because as does not support them.
+let Predicates = [ModernAs] in {
+ def : InstAlias<"mtudscr $Rx", (MTSPR8 3, g8rc:$Rx)>;
+ def : InstAlias<"mfudscr $Rx", (MFSPR8 g8rc:$Rx, 3)>;
+}
def : InstAlias<"mfrtcu $Rx", (MFSPR8 g8rc:$Rx, 4)>;
def : InstAlias<"mfrtcl $Rx", (MFSPR8 g8rc:$Rx, 5)>;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 018fb8ffe16c..724af23542d7 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1120,6 +1120,10 @@ def HasFPU : Predicate<"Subtarget->hasFPU()">;
def PCRelativeMemops : Predicate<"Subtarget->hasPCRelativeMemops()">;
def IsNotISA3_1 : Predicate<"!Subtarget->isISA3_1()">;
+// AIX assembler may not be modern enough to support some extended mne.
+def ModernAs: Predicate<"!Subtarget->isAIXABI() || Subtarget->HasModernAIXAs">,
+ AssemblerPredicate<(any_of (not AIXOS), FeatureModernAIXAs)>;
+
//===----------------------------------------------------------------------===//
// PowerPC Multiclass Definitions.
@@ -4649,8 +4653,11 @@ def : InstAlias<"mtmsr $RS", (MTMSR gprc:$RS, 0)>;
def : InstAlias<"mtxer $Rx", (MTSPR 1, gprc:$Rx)>;
def : InstAlias<"mfxer $Rx", (MFSPR gprc:$Rx, 1)>;
+//Disable this alias on AIX for now because as does not support them.
+let Predicates = [ModernAs] in {
def : InstAlias<"mtudscr $Rx", (MTSPR 3, gprc:$Rx)>;
def : InstAlias<"mfudscr $Rx", (MFSPR gprc:$Rx, 3)>;
+}
def : InstAlias<"mfrtcu $Rx", (MFSPR gprc:$Rx, 4)>;
def : InstAlias<"mfrtcl $Rx", (MFSPR gprc:$Rx, 5)>;
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index 86816fae5a55..d31195f67ef1 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -133,6 +133,8 @@ void PPCSubtarget::initializeEnvironment() {
UsePPCPostRASchedStrategy = false;
PairedVectorMemops = false;
PredictableSelectIsExpensive = false;
+ HasModernAIXAs = false;
+ IsAIX = false;
HasPOPCNTD = POPCNTD_Unavailable;
}
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index 5003e12b72bc..50d89390d5bc 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -153,6 +153,8 @@ class PPCSubtarget : public PPCGenSubtargetInfo {
bool UsePPCPostRASchedStrategy;
bool PairedVectorMemops;
bool PredictableSelectIsExpensive;
+ bool HasModernAIXAs;
+ bool IsAIX;
POPCNTDKind HasPOPCNTD;
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index b5c84e7c2616..0634833e64dc 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -190,6 +190,13 @@ static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL,
FullFS = "+invariant-function-descriptors";
}
+ if (TT.isOSAIX()) {
+ if (!FullFS.empty())
+ FullFS = "+aix," + FullFS;
+ else
+ FullFS = "+aix";
+ }
+
return FullFS;
}
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
index c12715b6472a..903217a1dfc3 100644
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
@@ -1,4 +1,7 @@
-# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s --check-prefixes=CHECK,MODERN
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefixes=CHECK,MODERN
+# RUN: llvm-mc --disassemble %s -triple powerpc64-ibm-aix-xcoff -mcpu=pwr7 | FileCheck %s --check-prefixes=CHECK,OLD
+# RUN: llvm-mc --disassemble %s -triple powerpc64-ibm-aix-xcoff -mattr=+modern-aix-as -mcpu=pwr7 | FileCheck %s --check-prefixes=CHECK,MODERN
# FIXME: decode as beqlr 0
# CHECK: bclr 12, 2
@@ -2212,10 +2215,12 @@
# CHECK: mfxer 2
0x7c 0x41 0x02 0xa6
-# CHECK: mtudscr 2
+# MODERN: mtudscr 2
+# OLD: mtspr 3, 2
0x7c 0x43 0x03 0xa6
-# CHECK: mfudscr 2
+# MODERN: mfudscr 2
+# OLD: mfspr 2, 3
0x7c 0x43 0x02 0xa6
# CHECK: mtlr 2
diff --git a/llvm/test/MC/PowerPC/modern-aix-as.s b/llvm/test/MC/PowerPC/modern-aix-as.s
new file mode 100644
index 000000000000..45f88a42d771
--- /dev/null
+++ b/llvm/test/MC/PowerPC/modern-aix-as.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc -triple powerpc64-unknown-unknown -mattr=+modern-aix-as --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown -mattr=+modern-aix-as --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown -mattr=-modern-aix-as --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
+# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -mattr=+aix --show-encoding %s 2>&1 | FileCheck -check-prefix=CHECK-OLD %s
+##TODO: Replace above with following when implement createXCOFFAsmParser
+# UN: llvm-mc -triple powerpc-aix-ibm-xcoff -mattr=+modern-aix-as --show-encoding %s 2>&1 | FileCheck -check-prefix=CHECK-BE %s
+# UN: not llvm-mc -triple powerpc-aix-ibm-xcoff --show-encoding %s 2>&1 | FileCheck -check-prefix=CHECK-OLD %s
+
+# CHECK-BE: mtudscr 2 # encoding: [0x7c,0x43,0x03,0xa6]
+# CHECK-LE: mtudscr 2 # encoding: [0xa6,0x03,0x43,0x7c]
+# CHECK-OLD: instruction use requires an option to be enabled
+ mtudscr 2
+# CHECK-BE: mfudscr 2 # encoding: [0x7c,0x43,0x02,0xa6]
+# CHECK-LE: mfudscr 2 # encoding: [0xa6,0x02,0x43,0x7c]
+ mfudscr 2
+
More information about the llvm-branch-commits
mailing list