[llvm-branch-commits] [llvm] e8622d2 - [Support] Add KnownBits::sextInReg exhaustive tests

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T14:27:45Z
New Revision: e8622d27c0e3020177ff47ad57dd1e5371feb9cf

URL: https://github.com/llvm/llvm-project/commit/e8622d27c0e3020177ff47ad57dd1e5371feb9cf
DIFF: https://github.com/llvm/llvm-project/commit/e8622d27c0e3020177ff47ad57dd1e5371feb9cf.diff

LOG: [Support] Add KnownBits::sextInReg exhaustive tests

Requested by @foad in rG9cf4f493a72f

Added: 
    

Modified: 
    llvm/unittests/Support/KnownBitsTest.cpp

Removed: 
    


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diff  --git a/llvm/unittests/Support/KnownBitsTest.cpp b/llvm/unittests/Support/KnownBitsTest.cpp
index ba587a1e2f65..991096098b8e 100644
--- a/llvm/unittests/Support/KnownBitsTest.cpp
+++ b/llvm/unittests/Support/KnownBitsTest.cpp
@@ -425,4 +425,24 @@ TEST(KnownBitsTest, SExtOrTrunc) {
   }
 }
 
+TEST(KnownBitsTest, SExtInReg) {
+  unsigned Bits = 4;
+  for (unsigned FromBits = 1; FromBits != Bits; ++FromBits) {
+    ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+      APInt CommonOne = APInt::getAllOnesValue(Bits);
+      APInt CommonZero = APInt::getAllOnesValue(Bits);
+      unsigned ExtBits = Bits - FromBits;
+      ForeachNumInKnownBits(Known, [&](const APInt &N) {
+        APInt Ext = N << ExtBits;
+        Ext.ashrInPlace(ExtBits);
+        CommonOne &= Ext;
+        CommonZero &= ~Ext;
+      });
+      KnownBits KnownSExtInReg = Known.sextInReg(FromBits);
+      EXPECT_EQ(CommonOne, KnownSExtInReg.One);
+      EXPECT_EQ(CommonZero, KnownSExtInReg.Zero);
+    });
+  }
+}
+
 } // end anonymous namespace