[llvm-branch-commits] [llvm] d1fa7af - [AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly

Martin Storsjö via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue Jan 12 14:04:19 PST 2021


Author: Martin Storsjö
Date: 2021-01-12T23:56:03+02:00
New Revision: d1fa7afc7aefd822698fe86431d8184b1e8b6683

URL: https://github.com/llvm/llvm-project/commit/d1fa7afc7aefd822698fe86431d8184b1e8b6683
DIFF: https://github.com/llvm/llvm-project/commit/d1fa7afc7aefd822698fe86431d8184b1e8b6683.diff

LOG: [AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly

This makes sure that assembly output actually can be assembled.

Set the correct MCExpr relocations specifier VK_PAGEOFF - and also
set VK_PAGE consistently even though it's not visible in the assembly
output.

Differential Revision: https://reviews.llvm.org/D94365

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
    llvm/test/CodeGen/AArch64/cfguard-checks.ll
    llvm/test/CodeGen/AArch64/dllimport.ll
    llvm/test/CodeGen/AArch64/mingw-refptr.ll
    llvm/test/CodeGen/AArch64/stack-protector-target.ll
    llvm/test/CodeGen/AArch64/win-tls.ll
    llvm/test/CodeGen/AArch64/win_cst_pool.ll
    llvm/test/CodeGen/AArch64/windows-extern-weak.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
index afd5ae6bcbf2..10e191ff44cf 100644
--- a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
@@ -203,6 +203,12 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
     RefFlags |= AArch64MCExpr::VK_SABS;
   } else {
     RefFlags |= AArch64MCExpr::VK_ABS;
+
+    if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
+      RefFlags |= AArch64MCExpr::VK_PAGE;
+    else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
+             AArch64II::MO_PAGEOFF)
+      RefFlags |= AArch64MCExpr::VK_PAGEOFF | AArch64MCExpr::VK_NC;
   }
 
   if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3)

diff  --git a/llvm/test/CodeGen/AArch64/cfguard-checks.ll b/llvm/test/CodeGen/AArch64/cfguard-checks.ll
index cb31decd57ba..66ec4b6ed074 100644
--- a/llvm/test/CodeGen/AArch64/cfguard-checks.ll
+++ b/llvm/test/CodeGen/AArch64/cfguard-checks.ll
@@ -18,7 +18,7 @@ entry:
 
   ; CHECK-LABEL: func_guard_nocf
   ; CHECK:       adrp x8, target_func
-	; CHECK:       add x8, x8, target_func
+	; CHECK:       add x8, x8, :lo12:target_func
   ; CHECK-NOT:   __guard_check_icall_fptr
 	; CHECK:       blr x8
 }
@@ -37,9 +37,9 @@ entry:
   ; The call to __guard_check_icall_fptr should come immediately before the call to the target function.
   ; CHECK-LABEL: func_optnone_cf
 	; CHECK:        adrp x8, target_func
-	; CHECK:        add x8, x8, target_func
+	; CHECK:        add x8, x8, :lo12:target_func
 	; CHECK:        adrp x9, __guard_check_icall_fptr
-	; CHECK:        add x9, x9, __guard_check_icall_fptr
+	; CHECK:        add x9, x9, :lo12:__guard_check_icall_fptr
 	; CHECK:        ldr x9, [x9]
 	; CHECK:        mov x15, x8
 	; CHECK:        blr x9
@@ -60,9 +60,9 @@ entry:
   ; The call to __guard_check_icall_fptr should come immediately before the call to the target function.
   ; CHECK-LABEL: func_cf
   ; CHECK:        adrp x8, __guard_check_icall_fptr
-	; CHECK:        ldr x9, [x8, __guard_check_icall_fptr]
+	; CHECK:        ldr x9, [x8, :lo12:__guard_check_icall_fptr]
 	; CHECK:        adrp x8, target_func
-	; CHECK:        add x8, x8, target_func
+	; CHECK:        add x8, x8, :lo12:target_func
 	; CHECK:        mov x15, x8
 	; CHECK: 	     	blr x9
 	; CHECK-NEXT:   blr x8
@@ -89,9 +89,9 @@ lpad:                                             ; preds = %entry
   ; The call to __guard_check_icall_fptr should come immediately before the call to the target function.
   ; CHECK-LABEL: func_cf_invoke
   ; CHECK:        adrp x8, __guard_check_icall_fptr
-	; CHECK:        ldr x9, [x8, __guard_check_icall_fptr]
+	; CHECK:        ldr x9, [x8, :lo12:__guard_check_icall_fptr]
 	; CHECK:        adrp x8, target_func
-	; CHECK:        add x8, x8, target_func
+	; CHECK:        add x8, x8, :lo12:target_func
 	; CHECK:        mov x15, x8
 	; CHECK:        blr x9
   ; CHECK-NEXT:   .Ltmp0:

diff  --git a/llvm/test/CodeGen/AArch64/dllimport.ll b/llvm/test/CodeGen/AArch64/dllimport.ll
index d72e987aec2d..ed90c805c53b 100644
--- a/llvm/test/CodeGen/AArch64/dllimport.ll
+++ b/llvm/test/CodeGen/AArch64/dllimport.ll
@@ -14,7 +14,7 @@ define i32 @get_var() {
 
 ; CHECK-LABEL: get_var
 ; CHECK: adrp x8, __imp_var
-; CHECK: ldr x8, [x8, __imp_var]
+; CHECK: ldr x8, [x8, :lo12:__imp_var]
 ; CHECK: ldr w0, [x8]
 ; CHECK: ret
 
@@ -25,10 +25,10 @@ define i32 @get_ext() {
 
 ; CHECK-LABEL: get_ext
 ; CHECK: adrp x8, ext
-; DAG-ISEL: ldr w0, [x8, ext]
-; FAST-ISEL: add x8, x8, ext
+; DAG-ISEL: ldr w0, [x8, :lo12:ext]
+; FAST-ISEL: add x8, x8, :lo12:ext
 ; FAST-ISEL: ldr w0, [x8]
-; GLOBAL-ISEL-FALLBACK: ldr w0, [x8, ext]
+; GLOBAL-ISEL-FALLBACK: ldr w0, [x8, :lo12:ext]
 ; CHECK: ret
 
 define i32* @get_var_pointer() {
@@ -37,7 +37,7 @@ define i32* @get_var_pointer() {
 
 ; CHECK-LABEL: get_var_pointer
 ; CHECK: adrp [[REG1:x[0-9]+]], __imp_var
-; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG1]], __imp_var]
+; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG1]], :lo12:__imp_var]
 ; CHECK: ret
 
 define i32 @call_external() {
@@ -47,7 +47,7 @@ define i32 @call_external() {
 
 ; CHECK-LABEL: call_external
 ; CHECK: adrp x0, __imp_external
-; CHECK: ldr x0, [x0, __imp_external]
+; CHECK: ldr x0, [x0, :lo12:__imp_external]
 ; CHECK: br x0
 
 define i32 @call_internal() {

diff  --git a/llvm/test/CodeGen/AArch64/mingw-refptr.ll b/llvm/test/CodeGen/AArch64/mingw-refptr.ll
index dde1b8952578..e68658eadeec 100644
--- a/llvm/test/CodeGen/AArch64/mingw-refptr.ll
+++ b/llvm/test/CodeGen/AArch64/mingw-refptr.ll
@@ -11,7 +11,7 @@
 define dso_local i32 @getVar() {
 ; CHECK-LABEL: getVar:
 ; CHECK:    adrp x8, .refptr.var
-; CHECK:    ldr  x8, [x8, .refptr.var]
+; CHECK:    ldr  x8, [x8, :lo12:.refptr.var]
 ; CHECK:    ldr  w0, [x8]
 ; CHECK:    ret
 entry:
@@ -22,7 +22,7 @@ entry:
 define dso_local i32 @getDsoLocalVar() {
 ; CHECK-LABEL: getDsoLocalVar:
 ; CHECK:    adrp x8, dsolocalvar
-; CHECK:    ldr  w0, [x8, dsolocalvar]
+; CHECK:    ldr  w0, [x8, :lo12:dsolocalvar]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @dsolocalvar, align 4
@@ -32,7 +32,7 @@ entry:
 define dso_local i32 @getLocalVar() {
 ; CHECK-LABEL: getLocalVar:
 ; CHECK:    adrp x8, localvar
-; CHECK:    ldr  w0, [x8, localvar]
+; CHECK:    ldr  w0, [x8, :lo12:localvar]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @localvar, align 4
@@ -42,7 +42,7 @@ entry:
 define dso_local i32 @getLocalCommon() {
 ; CHECK-LABEL: getLocalCommon:
 ; CHECK:    adrp x8, localcommon
-; CHECK:    ldr  w0, [x8, localcommon]
+; CHECK:    ldr  w0, [x8, :lo12:localcommon]
 ; CHECK:    ret
 entry:
   %0 = load i32, i32* @localcommon, align 4
@@ -52,7 +52,7 @@ entry:
 define dso_local i32 @getExtVar() {
 ; CHECK-LABEL: getExtVar:
 ; CHECK:    adrp x8, __imp_extvar
-; CHECK:    ldr  x8, [x8, __imp_extvar]
+; CHECK:    ldr  x8, [x8, :lo12:__imp_extvar]
 ; CHECK:    ldr  w0, [x8]
 ; CHECK:    ret
 entry:
@@ -74,11 +74,11 @@ declare dso_local void @otherFunc()
 define dso_local void @sspFunc() #0 {
 ; CHECK-LABEL: sspFunc:
 ; CHECK:    adrp x8, .refptr.__stack_chk_guard
-; CHECK:    ldr  x8, [x8, .refptr.__stack_chk_guard]
+; CHECK:    ldr  x8, [x8, :lo12:.refptr.__stack_chk_guard]
 ; CHECK:    ldr  x8, [x8]
 ; GISEL-LABEL: sspFunc:
 ; GISEL:    adrp x8, .refptr.__stack_chk_guard
-; GISEL:    ldr  x8, [x8, .refptr.__stack_chk_guard]
+; GISEL:    ldr  x8, [x8, :lo12:.refptr.__stack_chk_guard]
 ; GISEL:    ldr  x8, [x8]
 entry:
   %c = alloca i8, align 1

diff  --git a/llvm/test/CodeGen/AArch64/stack-protector-target.ll b/llvm/test/CodeGen/AArch64/stack-protector-target.ll
index 1d4b51bcd1cd..0c5905da81fc 100644
--- a/llvm/test/CodeGen/AArch64/stack-protector-target.ll
+++ b/llvm/test/CodeGen/AArch64/stack-protector-target.ll
@@ -30,7 +30,7 @@ declare void @_Z7CapturePi(i32*)
 ; FUCHSIA-AARCH64-COMMON: cmp [[C]], [[D]]
 
 ; WINDOWS-AARCH64: adrp x8, __security_cookie
-; WINDOWS-AARCH64: ldr x8, [x8, __security_cookie]
+; WINDOWS-AARCH64: ldr x8, [x8, :lo12:__security_cookie]
 ; WINDOWS-AARCH64: str x8, [sp, #8]
 ; WINDOWS-AARCH64: bl  _Z7CapturePi
 ; WINDOWS-AARCH64: ldr x0, [sp, #8]

diff  --git a/llvm/test/CodeGen/AArch64/win-tls.ll b/llvm/test/CodeGen/AArch64/win-tls.ll
index ea49b99bbaae..f83a1db39106 100644
--- a/llvm/test/CodeGen/AArch64/win-tls.ll
+++ b/llvm/test/CodeGen/AArch64/win-tls.ll
@@ -30,7 +30,7 @@ define i64 @getVar64() {
 
 ; CHECK-LABEL: getVar
 ; CHECK: adrp [[TLS_INDEX_ADDR:x[0-9]+]], _tls_index
-; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], _tls_index]
+; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], :lo12:_tls_index]
 ; CHECK: ldr [[TLS_POINTER:x[0-9]+]], [x18, #88]
 
 ; CHECK: ldr [[TLS:x[0-9]+]], {{\[}}[[TLS_POINTER]], x[[TLS_INDEX]], lsl #3]
@@ -39,7 +39,7 @@ define i64 @getVar64() {
 
 ; CHECK-LABEL: getPtr
 ; CHECK: adrp [[TLS_INDEX_ADDR:x[0-9]+]], _tls_index
-; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], _tls_index]
+; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], :lo12:_tls_index]
 ; CHECK: ldr [[TLS_POINTER:x[0-9]+]], [x18, #88]
 
 ; CHECK: ldr [[TLS:x[0-9]+]], {{\[}}[[TLS_POINTER]], x[[TLS_INDEX]], lsl #3]
@@ -48,7 +48,7 @@ define i64 @getVar64() {
 
 ; CHECK-LABEL: setVar
 ; CHECK: adrp [[TLS_INDEX_ADDR:x[0-9]+]], _tls_index
-; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], _tls_index]
+; CHECK: ldr w[[TLS_INDEX:[0-9]+]], {{\[}}[[TLS_INDEX_ADDR]], :lo12:_tls_index]
 ; CHECK: ldr [[TLS_POINTER:x[0-9]+]], [x18, #88]
 
 ; CHECK: ldr [[TLS:x[0-9]+]], {{\[}}[[TLS_POINTER]], x[[TLS_INDEX]], lsl #3]

diff  --git a/llvm/test/CodeGen/AArch64/win_cst_pool.ll b/llvm/test/CodeGen/AArch64/win_cst_pool.ll
index 5d9eed408d40..771118c8601d 100644
--- a/llvm/test/CodeGen/AArch64/win_cst_pool.ll
+++ b/llvm/test/CodeGen/AArch64/win_cst_pool.ll
@@ -11,7 +11,7 @@ define double @double() {
 ; CHECK-NEXT:         .xword   0x2000000000800001
 ; CHECK:      double:
 ; CHECK:               adrp    x8, __real at 2000000000800001
-; CHECK-NEXT:          ldr     d0, [x8, __real at 2000000000800001]
+; CHECK-NEXT:          ldr     d0, [x8, :lo12:__real at 2000000000800001]
 ; CHECK-NEXT:          ret
 
 ; MINGW:              .section        .rdata,"dr"
@@ -20,5 +20,5 @@ define double @double() {
 ; MINGW-NEXT:         .xword  0x2000000000800001
 ; MINGW:      double:
 ; MINGW:               adrp    x8, [[LABEL]]
-; MINGW-NEXT:          ldr     d0, [x8, [[LABEL]]]
+; MINGW-NEXT:          ldr     d0, [x8, :lo12:[[LABEL]]]
 ; MINGW-NEXT:          ret

diff  --git a/llvm/test/CodeGen/AArch64/windows-extern-weak.ll b/llvm/test/CodeGen/AArch64/windows-extern-weak.ll
index 3b4f4eeda5ea..18df2ddc5db4 100644
--- a/llvm/test/CodeGen/AArch64/windows-extern-weak.ll
+++ b/llvm/test/CodeGen/AArch64/windows-extern-weak.ll
@@ -8,7 +8,7 @@ define void @func() {
 ; CHECK-NEXT: .seh_save_reg_x x30, 16
 ; CHECK-NEXT: .seh_endprologue
 ; CHECK-NEXT: adrp x8, .refptr.weakfunc
-; CHECK-NEXT: ldr x8, [x8, .refptr.weakfunc]
+; CHECK-NEXT: ldr x8, [x8, :lo12:.refptr.weakfunc]
 ; CHECK-NEXT: cbz     x8, .LBB0_2
 ; CHECK-NEXT: ; %bb.1:
 ; CHECK-NEXT: blr     x8


        


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