[llvm-branch-commits] [llvm] 7e44208 - [X86][SSE] combineSubToSubus - add v16i32 handling on pre-AVX512BW targets.
Simon Pilgrim via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Jan 12 05:53:36 PST 2021
Author: Simon Pilgrim
Date: 2021-01-12T13:44:11Z
New Revision: 7e44208115b35ad34cc10259e9c375abbd636ef5
URL: https://github.com/llvm/llvm-project/commit/7e44208115b35ad34cc10259e9c375abbd636ef5
DIFF: https://github.com/llvm/llvm-project/commit/7e44208115b35ad34cc10259e9c375abbd636ef5.diff
LOG: [X86][SSE] combineSubToSubus - add v16i32 handling on pre-AVX512BW targets.
v16i32 -> v16i16/v8i16 truncation is now good enough using PACKSS/PACKUS + shuffle combining that its no longer necessary to early-out on pre-AVX512BW targets.
This was noticed while looking at completing PR40111 and moving combineSubToSubus to DAGCombine entirely.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/psubus.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e3a94f1c23ab..750c809eafca 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -48756,9 +48756,9 @@ static SDValue combineSubToSubus(SDNode *N, SelectionDAG &DAG,
// PSUBUS is supported, starting from SSE2.
EVT EltVT = VT.getVectorElementType();
- if (!(Subtarget.hasSSE2() && (EltVT == MVT::i8 || EltVT == MVT::i16 ||
- VT == MVT::v8i32 || VT == MVT::v8i64)) &&
- !(Subtarget.useBWIRegs() && (VT == MVT::v16i32)))
+ if (!(Subtarget.hasSSE2() &&
+ (EltVT == MVT::i8 || EltVT == MVT::i16 || VT == MVT::v8i32 ||
+ VT == MVT::v8i64 || VT == MVT::v16i32)))
return SDValue();
SDValue SubusLHS, SubusRHS;
@@ -48795,8 +48795,8 @@ static SDValue combineSubToSubus(SDNode *N, SelectionDAG &DAG,
SDValue MinRHS = Op1.getOperand(0).getOperand(1);
EVT TruncVT = Op1.getOperand(0).getValueType();
if (!(Subtarget.hasSSE2() &&
- (TruncVT == MVT::v8i32 || TruncVT == MVT::v8i64)) &&
- !(Subtarget.useBWIRegs() && (TruncVT == MVT::v16i32)))
+ (TruncVT == MVT::v8i32 || TruncVT == MVT::v8i64 ||
+ TruncVT == MVT::v16i32)))
return SDValue();
SDValue OpToSaturate;
if (MinLHS.getOpcode() == ISD::ZERO_EXTEND &&
diff --git a/llvm/test/CodeGen/X86/psubus.ll b/llvm/test/CodeGen/X86/psubus.ll
index 906af5e17211..06240cd8bad3 100644
--- a/llvm/test/CodeGen/X86/psubus.ll
+++ b/llvm/test/CodeGen/X86/psubus.ll
@@ -1737,141 +1737,125 @@ vector.ph:
define <16 x i16> @psubus_16i32_max(<16 x i16> %x, <16 x i32> %y) nounwind {
; SSE2-LABEL: psubus_16i32_max:
; SSE2: # %bb.0: # %vector.ph
-; SSE2-NEXT: movdqa %xmm1, %xmm8
-; SSE2-NEXT: pxor %xmm7, %xmm7
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3]
-; SSE2-NEXT: punpckhwd {{.*#+}} xmm8 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
-; SSE2-NEXT: movdqa %xmm0, %xmm10
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm7[0],xmm10[1],xmm7[1],xmm10[2],xmm7[2],xmm10[3],xmm7[3]
-; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm7[4],xmm0[5],xmm7[5],xmm0[6],xmm7[6],xmm0[7],xmm7[7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT: movdqa %xmm3, %xmm6
-; SSE2-NEXT: pxor %xmm7, %xmm6
-; SSE2-NEXT: movdqa %xmm0, %xmm9
-; SSE2-NEXT: por %xmm7, %xmm9
-; SSE2-NEXT: pcmpgtd %xmm6, %xmm9
-; SSE2-NEXT: pand %xmm9, %xmm0
-; SSE2-NEXT: pandn %xmm3, %xmm9
-; SSE2-NEXT: por %xmm0, %xmm9
-; SSE2-NEXT: movdqa %xmm2, %xmm6
-; SSE2-NEXT: pxor %xmm7, %xmm6
-; SSE2-NEXT: movdqa %xmm10, %xmm0
-; SSE2-NEXT: por %xmm7, %xmm0
-; SSE2-NEXT: pcmpgtd %xmm6, %xmm0
-; SSE2-NEXT: pand %xmm0, %xmm10
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm10, %xmm0
-; SSE2-NEXT: movdqa %xmm5, %xmm10
-; SSE2-NEXT: pxor %xmm7, %xmm10
-; SSE2-NEXT: movdqa %xmm8, %xmm6
-; SSE2-NEXT: por %xmm7, %xmm6
-; SSE2-NEXT: pcmpgtd %xmm10, %xmm6
-; SSE2-NEXT: pand %xmm6, %xmm8
-; SSE2-NEXT: pandn %xmm5, %xmm6
-; SSE2-NEXT: por %xmm8, %xmm6
-; SSE2-NEXT: movdqa %xmm4, %xmm8
-; SSE2-NEXT: pxor %xmm7, %xmm8
-; SSE2-NEXT: por %xmm1, %xmm7
-; SSE2-NEXT: pcmpgtd %xmm8, %xmm7
-; SSE2-NEXT: pand %xmm7, %xmm1
-; SSE2-NEXT: pandn %xmm4, %xmm7
-; SSE2-NEXT: por %xmm7, %xmm1
-; SSE2-NEXT: psubd %xmm4, %xmm1
-; SSE2-NEXT: psubd %xmm5, %xmm6
-; SSE2-NEXT: psubd %xmm2, %xmm0
-; SSE2-NEXT: psubd %xmm3, %xmm9
-; SSE2-NEXT: pslld $16, %xmm9
-; SSE2-NEXT: psrad $16, %xmm9
-; SSE2-NEXT: pslld $16, %xmm0
-; SSE2-NEXT: psrad $16, %xmm0
-; SSE2-NEXT: packssdw %xmm9, %xmm0
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [2147483648,2147483648,2147483648,2147483648]
+; SSE2-NEXT: movdqa %xmm3, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147549183,2147549183,2147549183,2147549183]
+; SSE2-NEXT: movdqa %xmm7, %xmm6
+; SSE2-NEXT: pcmpgtd %xmm8, %xmm6
+; SSE2-NEXT: pcmpeqd %xmm8, %xmm8
+; SSE2-NEXT: pand %xmm6, %xmm3
+; SSE2-NEXT: pxor %xmm8, %xmm6
+; SSE2-NEXT: por %xmm3, %xmm6
; SSE2-NEXT: pslld $16, %xmm6
; SSE2-NEXT: psrad $16, %xmm6
-; SSE2-NEXT: pslld $16, %xmm1
+; SSE2-NEXT: movdqa %xmm2, %xmm10
+; SSE2-NEXT: pxor %xmm9, %xmm10
+; SSE2-NEXT: movdqa %xmm7, %xmm3
+; SSE2-NEXT: pcmpgtd %xmm10, %xmm3
+; SSE2-NEXT: pand %xmm3, %xmm2
+; SSE2-NEXT: pxor %xmm8, %xmm3
+; SSE2-NEXT: por %xmm2, %xmm3
+; SSE2-NEXT: pslld $16, %xmm3
+; SSE2-NEXT: psrad $16, %xmm3
+; SSE2-NEXT: packssdw %xmm6, %xmm3
+; SSE2-NEXT: movdqa %xmm5, %xmm2
+; SSE2-NEXT: pxor %xmm9, %xmm2
+; SSE2-NEXT: movdqa %xmm7, %xmm6
+; SSE2-NEXT: pcmpgtd %xmm2, %xmm6
+; SSE2-NEXT: pand %xmm6, %xmm5
+; SSE2-NEXT: pxor %xmm8, %xmm6
+; SSE2-NEXT: por %xmm5, %xmm6
+; SSE2-NEXT: pslld $16, %xmm6
+; SSE2-NEXT: psrad $16, %xmm6
+; SSE2-NEXT: pxor %xmm4, %xmm9
+; SSE2-NEXT: pcmpgtd %xmm9, %xmm7
+; SSE2-NEXT: pxor %xmm7, %xmm8
+; SSE2-NEXT: pand %xmm4, %xmm7
+; SSE2-NEXT: por %xmm8, %xmm7
+; SSE2-NEXT: pslld $16, %xmm7
+; SSE2-NEXT: psrad $16, %xmm7
+; SSE2-NEXT: packssdw %xmm6, %xmm7
+; SSE2-NEXT: psubusw %xmm7, %xmm1
+; SSE2-NEXT: psubusw %xmm3, %xmm0
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; SSE2-NEXT: psrad $16, %xmm2
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
+; SSE2-NEXT: psrad $16, %xmm0
+; SSE2-NEXT: packssdw %xmm2, %xmm0
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
+; SSE2-NEXT: psrad $16, %xmm2
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3]
; SSE2-NEXT: psrad $16, %xmm1
-; SSE2-NEXT: packssdw %xmm6, %xmm1
+; SSE2-NEXT: packssdw %xmm2, %xmm1
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_16i32_max:
; SSSE3: # %bb.0: # %vector.ph
-; SSSE3-NEXT: movdqa %xmm1, %xmm8
-; SSSE3-NEXT: pxor %xmm7, %xmm7
-; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3]
-; SSSE3-NEXT: punpckhwd {{.*#+}} xmm8 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
-; SSSE3-NEXT: movdqa %xmm0, %xmm10
-; SSSE3-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm7[0],xmm10[1],xmm7[1],xmm10[2],xmm7[2],xmm10[3],xmm7[3]
-; SSSE3-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm7[4],xmm0[5],xmm7[5],xmm0[6],xmm7[6],xmm0[7],xmm7[7]
-; SSSE3-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
-; SSSE3-NEXT: movdqa %xmm3, %xmm6
-; SSSE3-NEXT: pxor %xmm7, %xmm6
-; SSSE3-NEXT: movdqa %xmm0, %xmm9
-; SSSE3-NEXT: por %xmm7, %xmm9
-; SSSE3-NEXT: pcmpgtd %xmm6, %xmm9
-; SSSE3-NEXT: pand %xmm9, %xmm0
-; SSSE3-NEXT: pandn %xmm3, %xmm9
-; SSSE3-NEXT: por %xmm0, %xmm9
-; SSSE3-NEXT: movdqa %xmm2, %xmm6
-; SSSE3-NEXT: pxor %xmm7, %xmm6
-; SSSE3-NEXT: movdqa %xmm10, %xmm0
-; SSSE3-NEXT: por %xmm7, %xmm0
-; SSSE3-NEXT: pcmpgtd %xmm6, %xmm0
-; SSSE3-NEXT: pand %xmm0, %xmm10
-; SSSE3-NEXT: pandn %xmm2, %xmm0
-; SSSE3-NEXT: por %xmm10, %xmm0
-; SSSE3-NEXT: movdqa %xmm5, %xmm10
-; SSSE3-NEXT: pxor %xmm7, %xmm10
-; SSSE3-NEXT: movdqa %xmm8, %xmm6
-; SSSE3-NEXT: por %xmm7, %xmm6
-; SSSE3-NEXT: pcmpgtd %xmm10, %xmm6
-; SSSE3-NEXT: pand %xmm6, %xmm8
-; SSSE3-NEXT: pandn %xmm5, %xmm6
-; SSSE3-NEXT: por %xmm8, %xmm6
-; SSSE3-NEXT: movdqa %xmm4, %xmm8
-; SSSE3-NEXT: pxor %xmm7, %xmm8
-; SSSE3-NEXT: por %xmm1, %xmm7
-; SSSE3-NEXT: pcmpgtd %xmm8, %xmm7
-; SSSE3-NEXT: pand %xmm7, %xmm1
-; SSSE3-NEXT: pandn %xmm4, %xmm7
-; SSSE3-NEXT: por %xmm7, %xmm1
-; SSSE3-NEXT: psubd %xmm4, %xmm1
-; SSSE3-NEXT: psubd %xmm5, %xmm6
-; SSSE3-NEXT: psubd %xmm2, %xmm0
-; SSSE3-NEXT: psubd %xmm3, %xmm9
-; SSSE3-NEXT: pslld $16, %xmm9
-; SSSE3-NEXT: psrad $16, %xmm9
-; SSSE3-NEXT: pslld $16, %xmm0
-; SSSE3-NEXT: psrad $16, %xmm0
-; SSSE3-NEXT: packssdw %xmm9, %xmm0
+; SSSE3-NEXT: movdqa {{.*#+}} xmm9 = [2147483648,2147483648,2147483648,2147483648]
+; SSSE3-NEXT: movdqa %xmm3, %xmm8
+; SSSE3-NEXT: pxor %xmm9, %xmm8
+; SSSE3-NEXT: movdqa {{.*#+}} xmm7 = [2147549183,2147549183,2147549183,2147549183]
+; SSSE3-NEXT: movdqa %xmm7, %xmm6
+; SSSE3-NEXT: pcmpgtd %xmm8, %xmm6
+; SSSE3-NEXT: pcmpeqd %xmm8, %xmm8
+; SSSE3-NEXT: pand %xmm6, %xmm3
+; SSSE3-NEXT: pxor %xmm8, %xmm6
+; SSSE3-NEXT: por %xmm3, %xmm6
+; SSSE3-NEXT: pslld $16, %xmm6
+; SSSE3-NEXT: psrad $16, %xmm6
+; SSSE3-NEXT: movdqa %xmm2, %xmm10
+; SSSE3-NEXT: pxor %xmm9, %xmm10
+; SSSE3-NEXT: movdqa %xmm7, %xmm3
+; SSSE3-NEXT: pcmpgtd %xmm10, %xmm3
+; SSSE3-NEXT: pand %xmm3, %xmm2
+; SSSE3-NEXT: pxor %xmm8, %xmm3
+; SSSE3-NEXT: por %xmm2, %xmm3
+; SSSE3-NEXT: pslld $16, %xmm3
+; SSSE3-NEXT: psrad $16, %xmm3
+; SSSE3-NEXT: packssdw %xmm6, %xmm3
+; SSSE3-NEXT: movdqa %xmm5, %xmm2
+; SSSE3-NEXT: pxor %xmm9, %xmm2
+; SSSE3-NEXT: movdqa %xmm7, %xmm6
+; SSSE3-NEXT: pcmpgtd %xmm2, %xmm6
+; SSSE3-NEXT: pand %xmm6, %xmm5
+; SSSE3-NEXT: pxor %xmm8, %xmm6
+; SSSE3-NEXT: por %xmm5, %xmm6
; SSSE3-NEXT: pslld $16, %xmm6
; SSSE3-NEXT: psrad $16, %xmm6
-; SSSE3-NEXT: pslld $16, %xmm1
+; SSSE3-NEXT: pxor %xmm4, %xmm9
+; SSSE3-NEXT: pcmpgtd %xmm9, %xmm7
+; SSSE3-NEXT: pxor %xmm7, %xmm8
+; SSSE3-NEXT: pand %xmm4, %xmm7
+; SSSE3-NEXT: por %xmm8, %xmm7
+; SSSE3-NEXT: pslld $16, %xmm7
+; SSSE3-NEXT: psrad $16, %xmm7
+; SSSE3-NEXT: packssdw %xmm6, %xmm7
+; SSSE3-NEXT: psubusw %xmm7, %xmm1
+; SSSE3-NEXT: psubusw %xmm3, %xmm0
+; SSSE3-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; SSSE3-NEXT: psrad $16, %xmm2
+; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
+; SSSE3-NEXT: psrad $16, %xmm0
+; SSSE3-NEXT: packssdw %xmm2, %xmm0
+; SSSE3-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
+; SSSE3-NEXT: psrad $16, %xmm2
+; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3]
; SSSE3-NEXT: psrad $16, %xmm1
-; SSSE3-NEXT: packssdw %xmm6, %xmm1
+; SSSE3-NEXT: packssdw %xmm2, %xmm1
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_16i32_max:
; SSE41: # %bb.0: # %vector.ph
-; SSE41-NEXT: pxor %xmm8, %xmm8
-; SSE41-NEXT: pmovzxwd {{.*#+}} xmm6 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm8[4],xmm1[5],xmm8[5],xmm1[6],xmm8[6],xmm1[7],xmm8[7]
-; SSE41-NEXT: pmovzxwd {{.*#+}} xmm7 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE41-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm8[4],xmm0[5],xmm8[5],xmm0[6],xmm8[6],xmm0[7],xmm8[7]
-; SSE41-NEXT: pmaxud %xmm3, %xmm0
-; SSE41-NEXT: pmaxud %xmm2, %xmm7
-; SSE41-NEXT: pmaxud %xmm5, %xmm1
-; SSE41-NEXT: pmaxud %xmm4, %xmm6
-; SSE41-NEXT: psubd %xmm4, %xmm6
-; SSE41-NEXT: psubd %xmm5, %xmm1
-; SSE41-NEXT: psubd %xmm2, %xmm7
-; SSE41-NEXT: psubd %xmm3, %xmm0
-; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm8[1],xmm0[2],xmm8[3],xmm0[4],xmm8[5],xmm0[6],xmm8[7]
-; SSE41-NEXT: pblendw {{.*#+}} xmm7 = xmm7[0],xmm8[1],xmm7[2],xmm8[3],xmm7[4],xmm8[5],xmm7[6],xmm8[7]
-; SSE41-NEXT: packusdw %xmm0, %xmm7
-; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm8[1],xmm1[2],xmm8[3],xmm1[4],xmm8[5],xmm1[6],xmm8[7]
-; SSE41-NEXT: pblendw {{.*#+}} xmm6 = xmm6[0],xmm8[1],xmm6[2],xmm8[3],xmm6[4],xmm8[5],xmm6[6],xmm8[7]
-; SSE41-NEXT: packusdw %xmm1, %xmm6
-; SSE41-NEXT: movdqa %xmm7, %xmm0
-; SSE41-NEXT: movdqa %xmm6, %xmm1
+; SSE41-NEXT: movdqa {{.*#+}} xmm6 = [65535,65535,65535,65535]
+; SSE41-NEXT: pminud %xmm6, %xmm5
+; SSE41-NEXT: pminud %xmm6, %xmm4
+; SSE41-NEXT: packusdw %xmm5, %xmm4
+; SSE41-NEXT: pminud %xmm6, %xmm3
+; SSE41-NEXT: pminud %xmm6, %xmm2
+; SSE41-NEXT: packusdw %xmm3, %xmm2
+; SSE41-NEXT: psubusw %xmm2, %xmm0
+; SSE41-NEXT: psubusw %xmm4, %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_16i32_max:
@@ -1894,16 +1878,11 @@ define <16 x i16> @psubus_16i32_max(<16 x i16> %x, <16 x i32> %y) nounwind {
; AVX2-LABEL: psubus_16i32_max:
; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [65535,65535,65535,65535,65535,65535,65535,65535]
-; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm1
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm4
-; AVX2-NEXT: vpackusdw %xmm4, %xmm1, %xmm1
; AVX2-NEXT: vpminud %ymm3, %ymm2, %ymm2
-; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3
-; AVX2-NEXT: vpackusdw %xmm3, %xmm2, %xmm2
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
-; AVX2-NEXT: vpsubusw %xmm2, %xmm3, %xmm2
-; AVX2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpackusdw %ymm2, %ymm1, %ymm1
+; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,1,3]
+; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_16i32_max:
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