[llvm-branch-commits] [mlir] dcac2da - [IR Parser] Fix a crash handling zero width integer attributes.

[Chris Lattner via llvm-branch-commits]

Author: Chris Lattner
Date: 2021-01-10T21:18:01-08:00
New Revision: dcac2da10632c83737fce6da60fbc4dd09c01034

URL: https://github.com/llvm/llvm-project/commit/dcac2da10632c83737fce6da60fbc4dd09c01034
DIFF: https://github.com/llvm/llvm-project/commit/dcac2da10632c83737fce6da60fbc4dd09c01034.diff

LOG: [IR Parser] Fix a crash handling zero width integer attributes.

llvm::APInt cannot hold zero bit values, therefore we shouldn't try
to form them.

Differential Revision: https://reviews.llvm.org/D94384

Added: 
    

Modified: 
    mlir/lib/Parser/AttributeParser.cpp
    mlir/test/IR/invalid-ops.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Parser/AttributeParser.cpp b/mlir/lib/Parser/AttributeParser.cpp
index e78237e8e5a0..859e8e279917 100644
--- a/mlir/lib/Parser/AttributeParser.cpp
+++ b/mlir/lib/Parser/AttributeParser.cpp
@@ -334,6 +334,11 @@ static Optional<APInt> buildAttributeAPInt(Type type, bool isNegative,
   // Extend or truncate the bitwidth to the right size.
   unsigned width = type.isIndex() ? IndexType::kInternalStorageBitWidth
                                   : type.getIntOrFloatBitWidth();
+
+  // APInt cannot hold a zero bit value.
+  if (width == 0)
+    return llvm::None;
+
   if (width > result.getBitWidth()) {
     result = result.zext(width);
   } else if (width < result.getBitWidth()) {

diff  --git a/mlir/test/IR/invalid-ops.mlir b/mlir/test/IR/invalid-ops.mlir
index 595e3fe3f123..ff39611eaea1 100644
--- a/mlir/test/IR/invalid-ops.mlir
+++ b/mlir/test/IR/invalid-ops.mlir
@@ -1252,3 +1252,11 @@ func @subtensor_wrong_static_type(%t: tensor<8x16x4xf32>, %idx : index) {
 
   return
 }
+
+// -----
+
+func @no_zero_bit_integer_attrs() {
+  // expected-error @+1 {{integer constant out of range for attribute}}
+  %x = "some.op"(){value = 0 : i0} : () -> f32
+  return
+}
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