[llvm-branch-commits] [clang] 63b42a0 - [NFC] clang/test/openMP/target_codegen.cpp should not depend on ssa name

Shilei Tian via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Jan 7 13:43:21 PST 2021


Author: Jeroen Dobbelaere
Date: 2021-01-07T16:39:17-05:00
New Revision: 63b42a0514567d24df617e4587e80e4564ebf120

URL: https://github.com/llvm/llvm-project/commit/63b42a0514567d24df617e4587e80e4564ebf120
DIFF: https://github.com/llvm/llvm-project/commit/63b42a0514567d24df617e4587e80e4564ebf120.diff

LOG: [NFC] clang/test/openMP/target_codegen.cpp should not depend on ssa name

This makes the test more robust to other changes.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D93038

Added: 
    

Modified: 
    clang/test/OpenMP/target_codegen.cpp

Removed: 
    


################################################################################
diff  --git a/clang/test/OpenMP/target_codegen.cpp b/clang/test/OpenMP/target_codegen.cpp
index c504ff6b7ac6..7dafa6ba13d4 100644
--- a/clang/test/OpenMP/target_codegen.cpp
+++ b/clang/test/OpenMP/target_codegen.cpp
@@ -397,7 +397,7 @@ int foo(int n) {
 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_nowait_mapper(%struct.ident_t* @{{.+}}, i64 [[DEVICE:%.+]], i8* @{{[^,]+}}, i32 2, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i64* [[SIZE:%.+]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* [[MAPT]], i32 0, i32 0), i8** null, i8** null)
 // CHECK-DAG: [[DEVICE]] = sext i32 [[DEV:%.+]] to i64
 // CHECK-DAG: [[DEV]] = load i32, i32* [[DEVADDR:%.+]], align
-// CHECK-DAG: [[DEVADDR]] = getelementptr inbounds [[ANON_T]], [[ANON_T]]* %12, i32 0, i32 2
+// CHECK-DAG: [[DEVADDR]] = getelementptr inbounds [[ANON_T]], [[ANON_T]]* {{%.+}}, i32 0, i32 2
 // CHECK-DAG: [[BPR]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BPRADDR:%.+]], i[[SZ]] 0, i[[SZ]] 0
 // CHECK-DAG: [[PR]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[PRADDR:%.+]], i[[SZ]] 0, i[[SZ]] 0
 // CHECK-DAG: [[SIZE]] = getelementptr inbounds [2 x i64], [2 x i64]* [[SIZEADDR:%.+]], i[[SZ]] 0, i[[SZ]] 0


        


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