[llvm-branch-commits] [llvm] 022cc6e - [PowerPC] Delete dead Lower*
Fangrui Song via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Jan 6 22:02:48 PST 2021
Author: Fangrui Song
Date: 2021-01-06T21:58:40-08:00
New Revision: 022cc6e34349ec83bca260fc74d10797b643496c
URL: https://github.com/llvm/llvm-project/commit/022cc6e34349ec83bca260fc74d10797b643496c
DIFF: https://github.com/llvm/llvm-project/commit/022cc6e34349ec83bca260fc74d10797b643496c.diff
LOG: [PowerPC] Delete dead Lower*
Added:
Modified:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index b92f4a15a49e..91a81e36f7da 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2399,36 +2399,6 @@ SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
return SDValue();
}
-/// isQVALIGNIShuffleMask - If this is a qvaligni shuffle mask, return the shift
-/// amount, otherwise return -1.
-int PPC::isQVALIGNIShuffleMask(SDNode *N) {
- EVT VT = N->getValueType(0);
- if (VT != MVT::v4f64 && VT != MVT::v4f32 && VT != MVT::v4i1)
- return -1;
-
- ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N);
-
- // Find the first non-undef value in the shuffle mask.
- unsigned i;
- for (i = 0; i != 4 && SVOp->getMaskElt(i) < 0; ++i)
- /*search*/;
-
- if (i == 4) return -1; // all undef.
-
- // Otherwise, check to see if the rest of the elements are consecutively
- // numbered from this value.
- unsigned ShiftAmt = SVOp->getMaskElt(i);
- if (ShiftAmt < i) return -1;
- ShiftAmt -= i;
-
- // Check the rest of the elements to see if they are consecutive.
- for (++i; i != 4; ++i)
- if (!isConstantOrUndef(SVOp->getMaskElt(i), ShiftAmt+i))
- return -1;
-
- return ShiftAmt;
-}
-
//===----------------------------------------------------------------------===//
// Addressing Mode Selection
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 10df7c2feddf..477105bd03ac 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -662,10 +662,6 @@ namespace llvm {
/// the number of bytes of each element [124] -> [bhw].
SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
- /// If this is a qvaligni shuffle mask, return the shift
- /// amount, otherwise return -1.
- int isQVALIGNIShuffleMask(SDNode *N);
-
} // end namespace PPC
class PPCTargetLowering : public TargetLowering {
@@ -1151,13 +1147,11 @@ namespace llvm {
SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
- SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerBSWAP(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
- SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
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