[llvm-branch-commits] [llvm] 4e838ba - [NewPM][AMDGPU] Port amdgpu-always-inline
Arthur Eubanks via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Jan 4 12:33:03 PST 2021
Author: Arthur Eubanks
Date: 2021-01-04T12:27:01-08:00
New Revision: 4e838ba9ea2cc7effbb051fdacf74a738b35eb6a
URL: https://github.com/llvm/llvm-project/commit/4e838ba9ea2cc7effbb051fdacf74a738b35eb6a
DIFF: https://github.com/llvm/llvm-project/commit/4e838ba9ea2cc7effbb051fdacf74a738b35eb6a.diff
LOG: [NewPM][AMDGPU] Port amdgpu-always-inline
And add to AMDGPU opt pipeline.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D94025
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPU.h
llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
llvm/tools/opt/opt.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index ea2755d4b6ed..503f1022bdae 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -253,6 +253,15 @@ FunctionPass *createAMDGPUISelDag(
TargetMachine *TM = nullptr,
CodeGenOpt::Level OptLevel = CodeGenOpt::Default);
ModulePass *createAMDGPUAlwaysInlinePass(bool GlobalOpt = true);
+
+struct AMDGPUAlwaysInlinePass : PassInfoMixin<AMDGPUAlwaysInlinePass> {
+ AMDGPUAlwaysInlinePass(bool GlobalOpt = true) : GlobalOpt(GlobalOpt) {}
+ PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
+
+private:
+ bool GlobalOpt;
+};
+
ModulePass *createR600OpenCLImageTypeLoweringPass();
FunctionPass *createAMDGPUAnnotateUniformValues();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
index 22947544ac07..aefc05b81f95 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
@@ -17,6 +17,7 @@
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/IR/Module.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/Transforms/Utils/Cloning.h"
using namespace llvm;
@@ -32,8 +33,6 @@ static cl::opt<bool> StressCalls(
class AMDGPUAlwaysInline : public ModulePass {
bool GlobalOpt;
- void recursivelyVisitUsers(GlobalValue &GV,
- SmallPtrSetImpl<Function *> &FuncsToAlwaysInline);
public:
static char ID;
@@ -53,9 +52,9 @@ INITIALIZE_PASS(AMDGPUAlwaysInline, "amdgpu-always-inline",
char AMDGPUAlwaysInline::ID = 0;
-void AMDGPUAlwaysInline::recursivelyVisitUsers(
- GlobalValue &GV,
- SmallPtrSetImpl<Function *> &FuncsToAlwaysInline) {
+static void
+recursivelyVisitUsers(GlobalValue &GV,
+ SmallPtrSetImpl<Function *> &FuncsToAlwaysInline) {
SmallVector<User *, 16> Stack;
SmallPtrSet<const Value *, 8> Visited;
@@ -91,7 +90,7 @@ void AMDGPUAlwaysInline::recursivelyVisitUsers(
}
}
-bool AMDGPUAlwaysInline::runOnModule(Module &M) {
+static bool alwaysInlineImpl(Module &M, bool GlobalOpt) {
std::vector<GlobalAlias*> AliasesToRemove;
SmallPtrSet<Function *, 8> FuncsToAlwaysInline;
@@ -157,7 +156,16 @@ bool AMDGPUAlwaysInline::runOnModule(Module &M) {
return !FuncsToAlwaysInline.empty() || !FuncsToNoInline.empty();
}
+bool AMDGPUAlwaysInline::runOnModule(Module &M) {
+ return alwaysInlineImpl(M, GlobalOpt);
+}
+
ModulePass *llvm::createAMDGPUAlwaysInlinePass(bool GlobalOpt) {
return new AMDGPUAlwaysInline(GlobalOpt);
}
+PreservedAnalyses AMDGPUAlwaysInlinePass::run(Module &M,
+ ModuleAnalysisManager &AM) {
+ alwaysInlineImpl(M, GlobalOpt);
+ return PreservedAnalyses::all();
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index fb50662a3f77..d3bea7f9469e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -506,6 +506,10 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB,
PM.addPass(AMDGPUPrintfRuntimeBindingPass());
return true;
}
+ if (PassName == "amdgpu-always-inline") {
+ PM.addPass(AMDGPUAlwaysInlinePass());
+ return true;
+ }
return false;
});
PB.registerPipelineParsingCallback(
@@ -565,6 +569,8 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB,
if (InternalizeSymbols) {
PM.addPass(GlobalDCEPass());
}
+ if (EarlyInlineAll && !EnableFunctionCalls)
+ PM.addPass(AMDGPUAlwaysInlinePass());
});
PB.registerCGSCCOptimizerLateEPCallback(
diff --git a/llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll b/llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
index 8ab59dc2224c..91ee7ff29b64 100644
--- a/llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
+++ b/llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
@@ -1,5 +1,7 @@
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-always-inline %s | FileCheck -check-prefixes=CALLS-ENABLED,ALL %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-always-inline %s | FileCheck -check-prefixes=CALLS-ENABLED,ALL %s
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-stress-function-calls -amdgpu-always-inline %s | FileCheck -check-prefixes=STRESS-CALLS,ALL %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-stress-function-calls -passes=amdgpu-always-inline %s | FileCheck -check-prefixes=STRESS-CALLS,ALL %s
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
diff --git a/llvm/tools/opt/opt.cpp b/llvm/tools/opt/opt.cpp
index 18c69b4f4a0a..2408aa939da1 100644
--- a/llvm/tools/opt/opt.cpp
+++ b/llvm/tools/opt/opt.cpp
@@ -471,7 +471,8 @@ static bool shouldPinPassToLegacyPM(StringRef Pass) {
"amdgpu-propagate-attributes-early",
"amdgpu-propagate-attributes-late",
"amdgpu-unify-metadata",
- "amdgpu-printf-runtime-binding"};
+ "amdgpu-printf-runtime-binding",
+ "amdgpu-always-inline"};
for (const auto &P : PassNameExactToIgnore)
if (Pass == P)
return false;
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