[llvm-branch-commits] [llvm] c287f90 - [VE] Change default CPU name to "generic"

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2021-01-04T20:09:57+09:00
New Revision: c287f90ccd33b3aa47488e8f2b3a24aa0717066b

URL: https://github.com/llvm/llvm-project/commit/c287f90ccd33b3aa47488e8f2b3a24aa0717066b
DIFF: https://github.com/llvm/llvm-project/commit/c287f90ccd33b3aa47488e8f2b3a24aa0717066b.diff

LOG: [VE] Change default CPU name to "generic"

Change default CPU name of SX-Aurora VE from "ve" to "generic" similar
to other architectures.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93836

Added: 
    llvm/test/CodeGen/VE/Scalar/cpu.ll

Modified: 
    llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
    llvm/lib/Target/VE/VE.td
    llvm/lib/Target/VE/VESubtarget.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
index 239a89812e47..4c480c050274 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
@@ -56,7 +56,7 @@ static MCRegisterInfo *createVEMCRegisterInfo(const Triple &TT) {
 static MCSubtargetInfo *createVEMCSubtargetInfo(const Triple &TT, StringRef CPU,
                                                 StringRef FS) {
   if (CPU.empty())
-    CPU = "ve";
+    CPU = "generic";
   return createVEMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS);
 }
 

diff  --git a/llvm/lib/Target/VE/VE.td b/llvm/lib/Target/VE/VE.td
index a2c0ba04adaa..9e8adcd42077 100644
--- a/llvm/lib/Target/VE/VE.td
+++ b/llvm/lib/Target/VE/VE.td
@@ -46,7 +46,7 @@ def VEAsmParser : AsmParser {
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, NoItineraries, Features>;
 
-def : Proc<"ve",             []>;
+def : Proc<"generic", []>;
 
 //===----------------------------------------------------------------------===//
 // Declare the target which we are implementing

diff  --git a/llvm/lib/Target/VE/VESubtarget.cpp b/llvm/lib/Target/VE/VESubtarget.cpp
index 3406a613e89d..daa6cfb8aa84 100644
--- a/llvm/lib/Target/VE/VESubtarget.cpp
+++ b/llvm/lib/Target/VE/VESubtarget.cpp
@@ -33,7 +33,7 @@ VESubtarget &VESubtarget::initializeSubtargetDependencies(StringRef CPU,
   // Determine default and user specified characteristics
   std::string CPUName = std::string(CPU);
   if (CPUName.empty())
-    CPUName = "ve";
+    CPUName = "generic";
 
   // Parse features string.
   ParseSubtargetFeatures(CPUName, /*TuneCPU=*/CPU, FS);

diff  --git a/llvm/test/CodeGen/VE/Scalar/cpu.ll b/llvm/test/CodeGen/VE/Scalar/cpu.ll
new file mode 100644
index 000000000000..7586a38f9f5a
--- /dev/null
+++ b/llvm/test/CodeGen/VE/Scalar/cpu.ll
@@ -0,0 +1,5 @@
+; RUN: llc -mtriple=ve -mcpu=help < %s 2>&1 | FileCheck %s
+
+; CHECK: Available CPUs for this target:
+; CHECK-EMPTY:
+; CHECK-NEXT: generic - Select the generic processor.