[llvm-branch-commits] [llvm] e3658ce - [VE] Change inetger constants 32-bit friendly
Tom Stellard via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Feb 3 14:05:09 PST 2021
Author: Kazushi (Jam) Marukawa
Date: 2021-02-03T14:04:14-08:00
New Revision: e3658cefc5bc3538d05fc8ef058d83bcd24b785a
URL: https://github.com/llvm/llvm-project/commit/e3658cefc5bc3538d05fc8ef058d83bcd24b785a
DIFF: https://github.com/llvm/llvm-project/commit/e3658cefc5bc3538d05fc8ef058d83bcd24b785a.diff
LOG: [VE] Change inetger constants 32-bit friendly
Correct integer constants like `1UL << 63` to `UINT64_C(1) << 63` in
order to make them work on 32-bit machines. Tested on both an i386
and x86_64 machines.
Reviewed By: mgorny
Differential Revision: https://reviews.llvm.org/D95724
(cherry picked from commit 4648098f97fa2a7c08c04632c70cf29293528812)
Added:
Modified:
llvm/lib/Target/VE/VE.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/VE/VE.h b/llvm/lib/Target/VE/VE.h
index a404f7ced70a..8c1fa840f19c 100644
--- a/llvm/lib/Target/VE/VE.h
+++ b/llvm/lib/Target/VE/VE.h
@@ -334,7 +334,7 @@ inline static bool isMImmVal(uint64_t Val) {
return true;
}
// (m)1 patterns
- return (Val & (1UL << 63)) && isShiftedMask_64(Val);
+ return (Val & (UINT64_C(1) << 63)) && isShiftedMask_64(Val);
}
inline static bool isMImm32Val(uint32_t Val) {
@@ -347,14 +347,14 @@ inline static bool isMImm32Val(uint32_t Val) {
return true;
}
// (m)1 patterns
- return (Val & (1 << 31)) && isShiftedMask_32(Val);
+ return (Val & (UINT32_C(1) << 31)) && isShiftedMask_32(Val);
}
/// val2MImm - Convert an integer immediate value to target MImm immediate.
inline static uint64_t val2MImm(uint64_t Val) {
if (Val == 0)
return 0; // (0)1
- if (Val & (1UL << 63))
+ if (Val & (UINT64_C(1) << 63))
return countLeadingOnes(Val); // (m)1
return countLeadingZeros(Val) | 0x40; // (m)0
}
@@ -364,8 +364,8 @@ inline static uint64_t mimm2Val(uint64_t Val) {
if (Val == 0)
return 0; // (0)1
if ((Val & 0x40) == 0)
- return (uint64_t)((1L << 63) >> (Val & 0x3f)); // (m)1
- return ((uint64_t)(-1L) >> (Val & 0x3f)); // (m)0
+ return (uint64_t)((INT64_C(1) << 63) >> (Val & 0x3f)); // (m)1
+ return ((uint64_t)INT64_C(-1) >> (Val & 0x3f)); // (m)0
}
inline unsigned M0(unsigned Val) { return Val + 64; }
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