[llvm-branch-commits] [llvm] 0077e16 - [Test] Add some more tests showing how we fail to widen IV
Max Kazantsev via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Nov 26 23:09:27 PST 2020
Author: Max Kazantsev
Date: 2020-11-27T14:03:38+07:00
New Revision: 0077e1680f83cf2ae014c7f3c2847fe106e24a5f
URL: https://github.com/llvm/llvm-project/commit/0077e1680f83cf2ae014c7f3c2847fe106e24a5f
DIFF: https://github.com/llvm/llvm-project/commit/0077e1680f83cf2ae014c7f3c2847fe106e24a5f.diff
LOG: [Test] Add some more tests showing how we fail to widen IV
Added:
Modified:
llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
index fb9b198fe8af..dd095c008772 100644
--- a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
+++ b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
@@ -794,3 +794,413 @@ failure:
call void @use(i32 %foo)
unreachable
}
+
+; TODO: We can widen here despite the icmp user of %foo in guarded block.
+define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_unsigned_pos1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[START]], -1
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP2]], -1
+; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK: guarded:
+; CHECK-NEXT: [[ICMP_USER3:%.*]] = icmp ult i32 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[ICMP_USER3]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: call void @use(i32 -1)
+; CHECK-NEXT: ret i32 -1
+; CHECK: failure:
+; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
+; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
+; CHECK-NEXT: unreachable
+; CHECK: side_exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+ %cond = icmp eq i32 %iv, 0
+ %foo = add i32 %iv, -1
+ br i1 %cond, label %exit, label %guarded
+
+guarded:
+ %icmp_user = icmp ult i32 %foo, %x
+ br i1 %icmp_user, label %backedge, label %side_exit
+
+backedge:
+ %index = zext i32 %foo to i64
+ %store.addr = getelementptr i32, i32* %p, i64 %index
+ store i32 1, i32* %store.addr
+ %load.addr = getelementptr i32, i32* %q, i64 %index
+ %stop = load i32, i32* %q
+ %loop.cond = icmp eq i32 %stop, 0
+ %iv.next.1 = add i32 %iv, -1
+ br i1 %loop.cond, label %loop, label %failure
+
+exit:
+ call void @use(i32 %foo)
+ ret i32 %foo
+
+failure:
+ call void @use(i32 %foo)
+ unreachable
+
+side_exit:
+ ret i32 0
+}
+
+; TODO: We can widen here despite the icmp user of %foo in guarded block.
+define i32 @test16_unsigned_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_unsigned_pos2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP1]], -1
+; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK: guarded:
+; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp ne i32 [[FOO]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: call void @use(i32 -1)
+; CHECK-NEXT: ret i32 -1
+; CHECK: failure:
+; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
+; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
+; CHECK-NEXT: unreachable
+; CHECK: side_exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+ %cond = icmp eq i32 %iv, 0
+ %foo = add i32 %iv, -1
+ br i1 %cond, label %exit, label %guarded
+
+guarded:
+ %icmp_user = icmp ne i32 %foo, %x
+ br i1 %icmp_user, label %backedge, label %side_exit
+
+backedge:
+ %index = zext i32 %foo to i64
+ %store.addr = getelementptr i32, i32* %p, i64 %index
+ store i32 1, i32* %store.addr
+ %load.addr = getelementptr i32, i32* %q, i64 %index
+ %stop = load i32, i32* %q
+ %loop.cond = icmp eq i32 %stop, 0
+ %iv.next.1 = add i32 %iv, -1
+ br i1 %loop.cond, label %loop, label %failure
+
+exit:
+ call void @use(i32 %foo)
+ ret i32 %foo
+
+failure:
+ call void @use(i32 %foo)
+ unreachable
+
+side_exit:
+ ret i32 0
+}
+
+; icmp slt user in guarded block prevents widening.
+define i32 @test16_unsigned_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_unsigned_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP1]], -1
+; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK: guarded:
+; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp slt i32 [[FOO]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: call void @use(i32 -1)
+; CHECK-NEXT: ret i32 -1
+; CHECK: failure:
+; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
+; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
+; CHECK-NEXT: unreachable
+; CHECK: side_exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+ %cond = icmp eq i32 %iv, 0
+ %foo = add i32 %iv, -1
+ br i1 %cond, label %exit, label %guarded
+
+guarded:
+ %icmp_user = icmp slt i32 %foo, %x
+ br i1 %icmp_user, label %backedge, label %side_exit
+
+backedge:
+ %index = zext i32 %foo to i64
+ %store.addr = getelementptr i32, i32* %p, i64 %index
+ store i32 1, i32* %store.addr
+ %load.addr = getelementptr i32, i32* %q, i64 %index
+ %stop = load i32, i32* %q
+ %loop.cond = icmp eq i32 %stop, 0
+ %iv.next.1 = add i32 %iv, -1
+ br i1 %loop.cond, label %loop, label %failure
+
+exit:
+ call void @use(i32 %foo)
+ ret i32 %foo
+
+failure:
+ call void @use(i32 %foo)
+ unreachable
+
+side_exit:
+ ret i32 0
+}
+
+; TODO: We can widen here despite the icmp user of %foo in guarded block.
+define i32 @test16_signed_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_signed_pos1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT_1:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 0
+; CHECK-NEXT: [[FOO:%.*]] = add i32 [[IV]], -1
+; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK: guarded:
+; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp slt i32 [[FOO]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: call void @use(i32 -1)
+; CHECK-NEXT: ret i32 -1
+; CHECK: failure:
+; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
+; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
+; CHECK-NEXT: unreachable
+; CHECK: side_exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+ %cond = icmp eq i32 %iv, 0
+ %foo = add i32 %iv, -1
+ br i1 %cond, label %exit, label %guarded
+
+guarded:
+ %icmp_user = icmp slt i32 %foo, %x
+ br i1 %icmp_user, label %backedge, label %side_exit
+
+backedge:
+ %index = sext i32 %foo to i64
+ %store.addr = getelementptr i32, i32* %p, i64 %index
+ store i32 1, i32* %store.addr
+ %load.addr = getelementptr i32, i32* %q, i64 %index
+ %stop = load i32, i32* %q
+ %loop.cond = icmp eq i32 %stop, 0
+ %iv.next.1 = add i32 %iv, -1
+ br i1 %loop.cond, label %loop, label %failure
+
+exit:
+ call void @use(i32 %foo)
+ ret i32 %foo
+
+failure:
+ call void @use(i32 %foo)
+ unreachable
+
+side_exit:
+ ret i32 0
+}
+
+; TODO: We can widen here despite the icmp user of %foo in guarded block.
+define i32 @test16_signed_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_signed_pos2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT_1:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 0
+; CHECK-NEXT: [[FOO:%.*]] = add i32 [[IV]], -1
+; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK: guarded:
+; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp ne i32 [[FOO]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: call void @use(i32 -1)
+; CHECK-NEXT: ret i32 -1
+; CHECK: failure:
+; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
+; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
+; CHECK-NEXT: unreachable
+; CHECK: side_exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+ %cond = icmp eq i32 %iv, 0
+ %foo = add i32 %iv, -1
+ br i1 %cond, label %exit, label %guarded
+
+guarded:
+ %icmp_user = icmp ne i32 %foo, %x
+ br i1 %icmp_user, label %backedge, label %side_exit
+
+backedge:
+ %index = sext i32 %foo to i64
+ %store.addr = getelementptr i32, i32* %p, i64 %index
+ store i32 1, i32* %store.addr
+ %load.addr = getelementptr i32, i32* %q, i64 %index
+ %stop = load i32, i32* %q
+ %loop.cond = icmp eq i32 %stop, 0
+ %iv.next.1 = add i32 %iv, -1
+ br i1 %loop.cond, label %loop, label %failure
+
+exit:
+ call void @use(i32 %foo)
+ ret i32 %foo
+
+failure:
+ call void @use(i32 %foo)
+ unreachable
+
+side_exit:
+ ret i32 0
+}
+
+; icmp ult user in guarded block prevents widening.
+define i32 @test16_signed_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_signed_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[START:%.*]], -1
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START]], [[ENTRY:%.*]] ], [ [[IV_NEXT_1:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 0
+; CHECK-NEXT: [[FOO:%.*]] = add i32 [[IV]], -1
+; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK: guarded:
+; CHECK-NEXT: [[ICMP_USER3:%.*]] = icmp ult i32 [[TMP0]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[ICMP_USER3]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: call void @use(i32 -1)
+; CHECK-NEXT: ret i32 -1
+; CHECK: failure:
+; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
+; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
+; CHECK-NEXT: unreachable
+; CHECK: side_exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+ %cond = icmp eq i32 %iv, 0
+ %foo = add i32 %iv, -1
+ br i1 %cond, label %exit, label %guarded
+
+guarded:
+ %icmp_user = icmp ult i32 %foo, %x
+ br i1 %icmp_user, label %backedge, label %side_exit
+
+backedge:
+ %index = sext i32 %foo to i64
+ %store.addr = getelementptr i32, i32* %p, i64 %index
+ store i32 1, i32* %store.addr
+ %load.addr = getelementptr i32, i32* %q, i64 %index
+ %stop = load i32, i32* %q
+ %loop.cond = icmp eq i32 %stop, 0
+ %iv.next.1 = add i32 %iv, -1
+ br i1 %loop.cond, label %loop, label %failure
+
+exit:
+ call void @use(i32 %foo)
+ ret i32 %foo
+
+failure:
+ call void @use(i32 %foo)
+ unreachable
+
+side_exit:
+ ret i32 0
+}
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