[llvm-branch-commits] [llvm] 000400c - Fix speling in comments. NFC.
Jay Foad via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Nov 23 07:01:34 PST 2020
Author: Jay Foad
Date: 2020-11-23T14:43:24Z
New Revision: 000400ca0aeb32e347eefd110a4ed58ebc23d333
URL: https://github.com/llvm/llvm-project/commit/000400ca0aeb32e347eefd110a4ed58ebc23d333
DIFF: https://github.com/llvm/llvm-project/commit/000400ca0aeb32e347eefd110a4ed58ebc23d333.diff
LOG: Fix speling in comments. NFC.
Added:
Modified:
llvm/include/llvm/ADT/DenseMap.h
llvm/lib/Analysis/GlobalsModRef.cpp
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/lib/Target/AMDGPU/SIDefines.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/ADT/DenseMap.h b/llvm/include/llvm/ADT/DenseMap.h
index 34d397cc9793..42e4fc84175c 100644
--- a/llvm/include/llvm/ADT/DenseMap.h
+++ b/llvm/include/llvm/ADT/DenseMap.h
@@ -954,7 +954,7 @@ class SmallDenseMap
std::swap(*LHSB, *RHSB);
continue;
}
- // Swap separately and handle any assymetry.
+ // Swap separately and handle any asymmetry.
std::swap(LHSB->getFirst(), RHSB->getFirst());
if (hasLHSValue) {
::new (&RHSB->getSecond()) ValueT(std::move(LHSB->getSecond()));
diff --git a/llvm/lib/Analysis/GlobalsModRef.cpp b/llvm/lib/Analysis/GlobalsModRef.cpp
index 37a345885b33..1a42c69b8b66 100644
--- a/llvm/lib/Analysis/GlobalsModRef.cpp
+++ b/llvm/lib/Analysis/GlobalsModRef.cpp
@@ -44,7 +44,7 @@ STATISTIC(NumIndirectGlobalVars, "Number of indirect global objects");
// An option to enable unsafe alias results from the GlobalsModRef analysis.
// When enabled, GlobalsModRef will provide no-alias results which in extremely
// rare cases may not be conservatively correct. In particular, in the face of
-// transforms which cause assymetry between how effective getUnderlyingObject
+// transforms which cause asymmetry between how effective getUnderlyingObject
// is for two pointers, it may produce incorrect results.
//
// These unsafe results have been returned by GMR for many years without
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 351f532ad4a3..cbbb0755b124 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -1649,7 +1649,7 @@ void AArch64FrameLowering::emitEpilogue(MachineFunction &MF,
// If the prologue didn't contain any SEH opcodes and didn't set the
// MF.hasWinCFI() flag, assume the epilogue won't either, and skip the
// EpilogStart - to avoid generating CFI for functions that don't need it.
- // (And as we didn't generate any prologue at all, it would be assymetrical
+ // (And as we didn't generate any prologue at all, it would be asymmetrical
// to the epilogue.) By the end of the function, we assert that
// HasWinCFI is equal to MF.hasWinCFI(), to verify this assumption.
HasWinCFI = true;
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index 0abd96dc4607..65c486ef73e2 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -33,7 +33,7 @@ enum : uint64_t {
VOP2 = 1 << 8,
VOPC = 1 << 9,
- // TODO: Should this be spilt into VOP3 a and b?
+ // TODO: Should this be spilt into VOP3 a and b?
VOP3 = 1 << 10,
VOP3P = 1 << 12,
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