[llvm-branch-commits] [compiler-rt] 5fa1f1e - [RISCV-V] Provide muldi3 builtin assembly implementation

[Tom Stellard via llvm-branch-commits]

Author: kamlesh kumar
Date: 2020-06-25T16:13:53-07:00
New Revision: 5fa1f1e9f44b9f9f3ba8c777cc3fd72a7952be5e

URL: https://github.com/llvm/llvm-project/commit/5fa1f1e9f44b9f9f3ba8c777cc3fd72a7952be5e
DIFF: https://github.com/llvm/llvm-project/commit/5fa1f1e9f44b9f9f3ba8c777cc3fd72a7952be5e.diff

LOG: [RISCV-V] Provide muldi3 builtin assembly implementation

Provides an assembly implementation of muldi3 for RISC-V, to solve bug 43388.
Since the implementation is the same as for mulsi3, that code was moved to
`riscv/int_mul_impl.inc` and is now reused by both `mulsi3.S` and `muldi3.S`.

Differential Revision: https://reviews.llvm.org/D80465

(cherry picked from commit e31ccee1b01acf703889312ee86023ff87bd39fe)

Added: 
    compiler-rt/lib/builtins/riscv/int_mul_impl.inc
    compiler-rt/lib/builtins/riscv/muldi3.S

Modified: 
    compiler-rt/lib/builtins/riscv/mulsi3.S

Removed: 
    


################################################################################
diff  --git a/compiler-rt/lib/builtins/riscv/int_mul_impl.inc b/compiler-rt/lib/builtins/riscv/int_mul_impl.inc
new file mode 100644
index 000000000000..50951d5f4195
--- /dev/null
+++ b/compiler-rt/lib/builtins/riscv/int_mul_impl.inc
@@ -0,0 +1,31 @@
+//===-- int_mul_impl.inc - Integer multiplication -------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Helpers used by __mulsi3, __muldi3.
+//
+//===----------------------------------------------------------------------===//
+
+#if !defined(__riscv_mul)
+	.text
+	.align 2
+
+	.globl __mulxi3
+	.type  __mulxi3, @function
+__mulxi3:
+	mv     a2, a0
+	mv     a0, zero
+.L1:
+	andi   a3, a1, 1
+	beqz   a3, .L2
+	add    a0, a0, a2
+.L2:
+	srli   a1, a1, 1
+	slli   a2, a2, 1
+	bnez   a1, .L1
+	ret
+#endif

diff  --git a/compiler-rt/lib/builtins/riscv/muldi3.S b/compiler-rt/lib/builtins/riscv/muldi3.S
new file mode 100644
index 000000000000..9e292e8dd8b9
--- /dev/null
+++ b/compiler-rt/lib/builtins/riscv/muldi3.S
@@ -0,0 +1,11 @@
+//===--- muldi3.S - Integer multiplication routines -----------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+#if __riscv_xlen == 64
+#define __mulxi3 __muldi3
+#include "int_mul_impl.inc"
+#endif

diff  --git a/compiler-rt/lib/builtins/riscv/mulsi3.S b/compiler-rt/lib/builtins/riscv/mulsi3.S
index 5464919b26b9..cfafb7a0d7b3 100644
--- a/compiler-rt/lib/builtins/riscv/mulsi3.S
+++ b/compiler-rt/lib/builtins/riscv/mulsi3.S
@@ -1,4 +1,4 @@
-//===--- mulsi3.S - Integer multiplication routines routines ---===//
+//===--- mulsi3.S - Integer multiplication routines -----------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -6,22 +6,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#if !defined(__riscv_mul) && __riscv_xlen == 32
-	.text
-	.align 2
-
-	.globl __mulsi3
-	.type  __mulsi3, @function
-__mulsi3:
-	mv     a2, a0
-	mv     a0, zero
-.L1:
-	andi   a3, a1, 1
-	beqz   a3, .L2
-	add    a0, a0, a2
-.L2:
-	srli   a1, a1, 1
-	slli   a2, a2, 1
-	bnez   a1, .L1
-	ret
+#if __riscv_xlen == 32
+#define __mulxi3 __mulsi3
+#include "int_mul_impl.inc"
 #endif