[llvm-branch-commits] [llvm] 1f3be0e - [PowerPC] Do not assume operand of ADDI is an immediate
Tom Stellard via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Jun 23 14:48:20 PDT 2020
Author: Nemanja Ivanovic
Date: 2020-06-23T14:46:06-07:00
New Revision: 1f3be0e9b7b476780e5226aa95488a4a0a262961
URL: https://github.com/llvm/llvm-project/commit/1f3be0e9b7b476780e5226aa95488a4a0a262961
DIFF: https://github.com/llvm/llvm-project/commit/1f3be0e9b7b476780e5226aa95488a4a0a262961.diff
LOG: [PowerPC] Do not assume operand of ADDI is an immediate
After pseudo-expansion, we may end up with ADDI (add immediate)
instructions where the operand is not an immediate but a relocation.
For such instructions, attempts to get the immediate result in
assertion failures for obvious reasons.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=45432
(cherry picked from commit a56d057dfe3127c111c3470606c04e96d35b1fa3)
Added:
llvm/test/CodeGen/PowerPC/pr45432.ll
Modified:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 30906a32b00c..d7925befcd37 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -2631,6 +2631,10 @@ bool PPCInstrInfo::isADDIInstrEligibleForFolding(MachineInstr &ADDIMI,
if (Opc != PPC::ADDI && Opc != PPC::ADDI8)
return false;
+ // The operand may not necessarily be an immediate - it could be a relocation.
+ if (!ADDIMI.getOperand(2).isImm())
+ return false;
+
Imm = ADDIMI.getOperand(2).getImm();
return true;
diff --git a/llvm/test/CodeGen/PowerPC/pr45432.ll b/llvm/test/CodeGen/PowerPC/pr45432.ll
new file mode 100644
index 000000000000..9adc3c1551bc
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/pr45432.ll
@@ -0,0 +1,52 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s
+%0 = type { double, [0 x %1] }
+%1 = type { i32 }
+
+ at f = external dso_local thread_local local_unnamed_addr global %0, align 8
+ at g = external dso_local local_unnamed_addr global i32, align 4
+
+; Function Attrs: nounwind
+define dso_local void @h() local_unnamed_addr #0 {
+; CHECK-LABEL: h:
+; CHECK: # %bb.0: # %bb
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: std 0, 16(1)
+; CHECK-NEXT: stdu 1, -64(1)
+; CHECK-NEXT: addis 3, 2, g at toc@ha
+; CHECK-NEXT: lwz 3, g at toc@l(3)
+; CHECK-NEXT: std 30, 48(1) # 8-byte Folded Spill
+; CHECK-NEXT: extswsli 30, 3, 2
+; CHECK-NEXT: addis 3, 2, f at got@tlsld at ha
+; CHECK-NEXT: addi 3, 3, f at got@tlsld at l
+; CHECK-NEXT: bl __tls_get_addr(f at tlsld)
+; CHECK-NEXT: nop
+; CHECK-NEXT: addis 3, 3, f at dtprel@ha
+; CHECK-NEXT: addi 3, 3, f at dtprel@l
+; CHECK-NEXT: add 3, 3, 30
+; CHECK-NEXT: lwz 3, 8(3)
+; CHECK-NEXT: cmplwi 3, 0
+; CHECK-NEXT: bne- 0, .LBB0_2
+; CHECK-NEXT: # %bb.1: # %bb6
+; CHECK-NEXT: ld 30, 48(1) # 8-byte Folded Reload
+; CHECK-NEXT: addi 1, 1, 64
+; CHECK-NEXT: ld 0, 16(1)
+; CHECK-NEXT: mtlr 0
+; CHECK-NEXT: blr
+; CHECK-NEXT: .LBB0_2: # %bb5
+bb:
+ %i = load i32, i32* @g, align 4
+ %i1 = sext i32 %i to i64
+ %i2 = getelementptr inbounds [0 x %1], [0 x %1]* bitcast (double* getelementptr inbounds (%0, %0* @f, i64 1, i32 0) to [0 x %1]*), i64 0, i64 %i1, i32 0
+ %i3 = load i32, i32* %i2, align 4
+ %i4 = icmp eq i32 %i3, 0
+ br i1 %i4, label %bb6, label %bb5
+
+bb5: ; preds = %bb
+ unreachable
+
+bb6: ; preds = %bb
+ ret void
+}
+
+attributes #0 = { nounwind }
More information about the llvm-branch-commits
mailing list