[llvm-branch-commits] [llvm] f1d4dfe - [Target] Test commit

[Evandro Menezes via llvm-branch-commits]

Author: Evandro Menezes
Date: 2020-01-24T13:39:19-08:00
New Revision: f1d4dfe3bc8ade49249de94ea5e55e5ea92288a8

URL: https://github.com/llvm/llvm-project/commit/f1d4dfe3bc8ade49249de94ea5e55e5ea92288a8
DIFF: https://github.com/llvm/llvm-project/commit/f1d4dfe3bc8ade49249de94ea5e55e5ea92288a8.diff

LOG: [Target] Test commit

Modify comment to reflect the current users of `Regisgter.CostPerUse`.

Added: 
    

Modified: 
    llvm/include/llvm/Target/Target.td

Removed: 
    


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diff  --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td
index cdc9b640e74e..f066810381ea 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -166,8 +166,9 @@ class Register<string n, list<string> altNames = []> {
   // CostPerUse - Additional cost of instructions using this register compared
   // to other registers in its class. The register allocator will try to
   // minimize the number of instructions using a register with a CostPerUse.
-  // This is used by the x86-64 and ARM Thumb targets where some registers
-  // require larger instruction encodings.
+  // This is used by the ARC target, by the ARM Thumb and x86-64 targets, where
+  // some registers require larger instruction encodings, by the RISC-V target,
+  // where some registers preclude using some C instructions. 
   int CostPerUse = 0;
 
   // CoveredBySubRegs - When this bit is set, the value of this register is