[llvm-branch-commits] [llvm] 77e448c - [NFC][InstCombine] Add shift amount reassociation miscompile example from PR44802
Hans Wennborg via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Feb 27 04:58:50 PST 2020
Author: Roman Lebedev
Date: 2020-02-27T13:45:21+01:00
New Revision: 77e448c0d3a87e7944381d7d53e55c997c8b936a
URL: https://github.com/llvm/llvm-project/commit/77e448c0d3a87e7944381d7d53e55c997c8b936a
DIFF: https://github.com/llvm/llvm-project/commit/77e448c0d3a87e7944381d7d53e55c997c8b936a.diff
LOG: [NFC][InstCombine] Add shift amount reassociation miscompile example from PR44802
https://bugs.llvm.org/show_bug.cgi?id=44802
(cherry picked from commit 425ef999385058143bb927aefe81daddcd43f623)
Added:
Modified:
llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll b/llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
index 6e54133baccb..0b8187d04172 100644
--- a/llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
+++ b/llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
@@ -319,3 +319,18 @@ define i32 @n20(i32 %x, i32 %y) {
%t3 = shl i32 %t1, %t2
ret i32 %t3
}
+
+; FIXME: this is a miscompile. We should not transform this.
+; See https://bugs.llvm.org/show_bug.cgi?id=44802
+define i3 @pr44802(i3 %t0) {
+; CHECK-LABEL: @pr44802(
+; CHECK-NEXT: [[T1:%.*]] = sub i3 0, [[T0:%.*]]
+; CHECK-NEXT: ret i3 [[T1]]
+;
+ %t1 = sub i3 0, %t0
+ %t2 = icmp ne i3 %t0, 0
+ %t3 = zext i1 %t2 to i3
+ %t4 = lshr i3 %t1, %t3
+ %t5 = lshr i3 %t4, %t3
+ ret i3 %t5
+}
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