[llvm-branch-commits] [llvm] 3c94b27 - [SystemZ] Bugfix in emitSelect()

[Hans Wennborg via llvm-branch-commits]

Author: Jonas Paulsson
Date: 2020-02-12T10:50:02+01:00
New Revision: 3c94b2780126be9cf0e828bbd62729cdc5f421da

URL: https://github.com/llvm/llvm-project/commit/3c94b2780126be9cf0e828bbd62729cdc5f421da
DIFF: https://github.com/llvm/llvm-project/commit/3c94b2780126be9cf0e828bbd62729cdc5f421da.diff

LOG: [SystemZ]  Bugfix in emitSelect()

When more than one SelectPseudo instruction is handled a new MBB is
returned. This must not be done if that would result in leaving an undhandled
isel pseudo behind in the original MBB.

Fixes https://bugs.llvm.org/show_bug.cgi?id=44849.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D74352

(cherry picked from commit 0311e28e9cc01a244faa774b8cab337b45404fa9)

Added: 
    llvm/test/CodeGen/SystemZ/multiselect-02.mir

Modified: 
    llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index c73905d3357a..ab00069497af 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -6859,8 +6859,6 @@ SystemZTargetLowering::emitSelect(MachineInstr &MI,
   for (MachineBasicBlock::iterator NextMIIt =
          std::next(MachineBasicBlock::iterator(MI));
        NextMIIt != MBB->end(); ++NextMIIt) {
-    if (NextMIIt->definesRegister(SystemZ::CC))
-      break;
     if (isSelectPseudo(*NextMIIt)) {
       assert(NextMIIt->getOperand(3).getImm() == CCValid &&
              "Bad CCValid operands since CC was not redefined.");
@@ -6871,6 +6869,9 @@ SystemZTargetLowering::emitSelect(MachineInstr &MI,
       }
       break;
     }
+    if (NextMIIt->definesRegister(SystemZ::CC) ||
+        NextMIIt->usesCustomInsertionHook())
+      break;
     bool User = false;
     for (auto SelMI : Selects)
       if (NextMIIt->readsVirtualRegister(SelMI->getOperand(0).getReg())) {

diff  --git a/llvm/test/CodeGen/SystemZ/multiselect-02.mir b/llvm/test/CodeGen/SystemZ/multiselect-02.mir
new file mode 100644
index 000000000000..fc8aa0ad538f
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/multiselect-02.mir
@@ -0,0 +1,43 @@
+# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z10 -run-pass=finalize-isel -o - %s \
+# RUN:   | FileCheck %s
+#
+# Test that an instruction (ZEXT128) that uses custom insertion gets treated
+# correctly also when it lies between two Select instructions that could
+# potentially be handled together.
+#
+# CHECK-LABEL: bb.0.entry:
+# CHECK-NOT: ZEXT128
+
+--- |
+  declare void @bar(i32)
+  define i32 @fun() { entry: ret i32 0 }
+---
+name:            fun
+body:             |
+  bb.0.entry:
+    %1:addr64bit = IMPLICIT_DEF
+    %0:gr32bit = LLC %1, 0, $noreg :: (load 1 from `i8* undef`)
+    CHI killed %0, 0, implicit-def $cc
+    %2:gr32bit = LHI 2
+    %3:gr32bit = LHI 8
+    %4:gr32bit = Select32 killed %3, killed %2, 14, 8, implicit $cc
+    %5:gr32bit = LHI 128
+    %7:gr64bit = IMPLICIT_DEF
+    %6:gr64bit = INSERT_SUBREG %7, killed %5, %subreg.subreg_l32
+    %8:gr128bit = ZEXT128 killed %6
+    %10:addr64bit = IMPLICIT_DEF
+    %9:gr128bit = DL %8, %10, 0, $noreg :: (load 4 from `i64* undef` + 4)
+    %11:gr32bit = COPY %9.subreg_l32
+    %12:gr64bit = LGHI 2
+    %13:gr64bit = LGHI 8
+    %14:gr64bit = Select64 killed %13, killed %12, 14, 8, implicit $cc
+    CR %4, %11, implicit-def $cc
+    %15:gr32bit = Select32 %11, %4, 14, 4, implicit $cc
+    ADJCALLSTACKDOWN 0, 0
+    $r2d = COPY %14
+    CallBRASL @bar, $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
+    ADJCALLSTACKUP 0, 0
+    $r2l = COPY %15
+    Return implicit $r2l
+
+...