[llvm-branch-commits] [llvm] 5cca13d - AMDGPU/R600: Emit rodata in text segment

[Hans Wennborg via llvm-branch-commits]

Author: Jan Vesely
Date: 2020-02-03T16:05:42+01:00
New Revision: 5cca13d43b7e972d0de6301cfed30781251489a1

URL: https://github.com/llvm/llvm-project/commit/5cca13d43b7e972d0de6301cfed30781251489a1
DIFF: https://github.com/llvm/llvm-project/commit/5cca13d43b7e972d0de6301cfed30781251489a1.diff

LOG: AMDGPU/R600: Emit rodata in text segment

R600 relies on this behaviour.
Fixes: 6e18266aa4dd78953557b8614cb9ff260bad7c65 ('Partially revert D61491 "AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0"')
Fixes ~100 piglit regressions since 6e18266

Differential Revision: https://reviews.llvm.org/D72991

(cherry picked from commit 1b8eab179db46f25a267bb73c657009c0bb542cc)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    llvm/test/CodeGen/AMDGPU/global-constant.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index 5271bc3aacc6..8b21b9346987 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -559,7 +559,7 @@ bool isReadOnlySegment(const GlobalValue *GV) {
 }
 
 bool shouldEmitConstantsToTextSection(const Triple &TT) {
-  return TT.getOS() == Triple::AMDPAL;
+  return TT.getOS() == Triple::AMDPAL || TT.getArch() == Triple::r600;
 }
 
 int getIntegerAttribute(const Function &F, StringRef Name, int Default) {

diff  --git a/llvm/test/CodeGen/AMDGPU/global-constant.ll b/llvm/test/CodeGen/AMDGPU/global-constant.ll
index 9c1560a01af6..479f026b8245 100644
--- a/llvm/test/CodeGen/AMDGPU/global-constant.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-constant.ll
@@ -2,6 +2,7 @@
 ; RUN: llc -mtriple=amdgcn-- -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOPAL %s
 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOPAL %s
 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOPAL %s
+; RUN: llc -mtriple=r600-- -mcpu=cypress < %s | FileCheck -check-prefix=R600 %s
 
 @private1 = private unnamed_addr addrspace(4) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0]
 @private2 = private unnamed_addr addrspace(4) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0]
@@ -28,6 +29,7 @@
 ; NOPAL: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2 at rel32@lo+4
 ; NOPAL: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], private2 at rel32@hi+4
 
+; R600-LABEL: private_test
 define amdgpu_kernel void @private_test(i32 %index, float addrspace(1)* %out) {
   %ptr = getelementptr [4 x float], [4 x float] addrspace(4) * @private1, i32 0, i32 %index
   %val = load float, float addrspace(4)* %ptr
@@ -42,6 +44,7 @@ define amdgpu_kernel void @private_test(i32 %index, float addrspace(1)* %out) {
 ; NOPAL: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
 ; NOPAL: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], available_externally at gotpcrel32@lo+4
 ; NOPAL: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], available_externally at gotpcrel32@hi+4
+; R600-LABEL: available_externally_test
 define amdgpu_kernel void @available_externally_test(i32 addrspace(1)* %out) {
   %ptr = getelementptr [256 x i32], [256 x i32] addrspace(4)* @available_externally, i32 0, i32 1
   %val = load i32, i32 addrspace(4)* %ptr
@@ -51,6 +54,9 @@ define amdgpu_kernel void @available_externally_test(i32 addrspace(1)* %out) {
 
 ; PAL: .text
 ; NOPAL: .section .rodata
+; R600: .text
 
 ; GCN: private1:
 ; GCN: private2:
+; R600: private1:
+; R600: private2: