[llvm-branch-commits] [llvm] 1e3ed09 - [CodeGen] Use llvm::append_range (NFC)
Kazu Hirata via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Dec 28 20:00:10 PST 2020
Author: Kazu Hirata
Date: 2020-12-28T19:55:16-08:00
New Revision: 1e3ed09165cf89b7f87318b4a5f7cab484661d49
URL: https://github.com/llvm/llvm-project/commit/1e3ed09165cf89b7f87318b4a5f7cab484661d49
DIFF: https://github.com/llvm/llvm-project/commit/1e3ed09165cf89b7f87318b4a5f7cab484661d49.diff
LOG: [CodeGen] Use llvm::append_range (NFC)
Added:
Modified:
llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/CodeGen/MachineModuleInfo.cpp
llvm/lib/CodeGen/MachineOutliner.cpp
llvm/lib/CodeGen/MachinePipeliner.cpp
llvm/lib/CodeGen/RDFLiveness.cpp
llvm/lib/CodeGen/ReachingDefAnalysis.cpp
llvm/lib/CodeGen/RegAllocPBQP.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp b/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
index 609afed8fe9f..1e3f33e70715 100644
--- a/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
@@ -38,8 +38,7 @@ void WinCFGuard::endFunction(const MachineFunction *MF) {
return;
// Copy the function's longjmp targets to a module-level list.
- LongjmpTargets.insert(LongjmpTargets.end(), MF->getLongjmpTargets().begin(),
- MF->getLongjmpTargets().end());
+ llvm::append_range(LongjmpTargets, MF->getLongjmpTargets());
}
/// Returns true if this function's address is escaped in a way that might make
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index ec3a7e7982b2..0698c3c3b993 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -737,7 +737,7 @@ bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function &F) {
SmallVector<Loop *, 16> LoopList(LI->begin(), LI->end());
while (!LoopList.empty()) {
Loop *L = LoopList.pop_back_val();
- LoopList.insert(LoopList.end(), L->begin(), L->end());
+ llvm::append_range(LoopList, *L);
if (BasicBlock *Preheader = L->getLoopPreheader())
Preheaders.insert(Preheader);
}
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 2a9a88af3ad6..1eb191465ac9 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -868,7 +868,7 @@ try_next:;
// Add the new filter.
int FilterID = -(1 + FilterIds.size());
FilterIds.reserve(FilterIds.size() + TyIds.size() + 1);
- FilterIds.insert(FilterIds.end(), TyIds.begin(), TyIds.end());
+ llvm::append_range(FilterIds, TyIds);
FilterEnds.push_back(FilterIds.size());
FilterIds.push_back(0); // terminator
return FilterID;
diff --git a/llvm/lib/CodeGen/MachineModuleInfo.cpp b/llvm/lib/CodeGen/MachineModuleInfo.cpp
index 5c2e2fb16b69..5565b9cededa 100644
--- a/llvm/lib/CodeGen/MachineModuleInfo.cpp
+++ b/llvm/lib/CodeGen/MachineModuleInfo.cpp
@@ -144,8 +144,7 @@ void MMIAddrLabelMap::UpdateForRAUWBlock(BasicBlock *Old, BasicBlock *New) {
BBCallbacks[OldEntry.Index] = nullptr; // Update the callback.
// Otherwise, we need to add the old symbols to the new block's set.
- NewEntry.Symbols.insert(NewEntry.Symbols.end(), OldEntry.Symbols.begin(),
- OldEntry.Symbols.end());
+ llvm::append_range(NewEntry.Symbols, OldEntry.Symbols);
}
void MMIAddrLabelMapCallbackPtr::deleted() {
diff --git a/llvm/lib/CodeGen/MachineOutliner.cpp b/llvm/lib/CodeGen/MachineOutliner.cpp
index a94a6e29dab9..ec3668a7b505 100644
--- a/llvm/lib/CodeGen/MachineOutliner.cpp
+++ b/llvm/lib/CodeGen/MachineOutliner.cpp
@@ -307,10 +307,8 @@ struct InstructionMapper {
// repeated substring.
mapToIllegalUnsigned(It, CanOutlineWithPrevInstr, UnsignedVecForMBB,
InstrListForMBB);
- InstrList.insert(InstrList.end(), InstrListForMBB.begin(),
- InstrListForMBB.end());
- UnsignedVec.insert(UnsignedVec.end(), UnsignedVecForMBB.begin(),
- UnsignedVecForMBB.end());
+ llvm::append_range(InstrList, InstrListForMBB);
+ llvm::append_range(UnsignedVec, UnsignedVecForMBB);
}
}
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
index c122800a196c..db4d78af5fa6 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -2953,7 +2953,7 @@ void SMSchedule::finalizeSchedule(SwingSchedulerDAG *SSD) {
}
// Replace the old order with the new order.
cycleInstrs.swap(newOrderPhi);
- cycleInstrs.insert(cycleInstrs.end(), newOrderI.begin(), newOrderI.end());
+ llvm::append_range(cycleInstrs, newOrderI);
SSD->fixupRegisterOverlaps(cycleInstrs);
}
diff --git a/llvm/lib/CodeGen/RDFLiveness.cpp b/llvm/lib/CodeGen/RDFLiveness.cpp
index 37273bb0c4bb..a8b254061b41 100644
--- a/llvm/lib/CodeGen/RDFLiveness.cpp
+++ b/llvm/lib/CodeGen/RDFLiveness.cpp
@@ -286,7 +286,7 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
if (FullChain || IsPhi || !RRs.hasCoverOf(QR))
Ds.push_back(DA);
}
- RDefs.insert(RDefs.end(), Ds.begin(), Ds.end());
+ llvm::append_range(RDefs, Ds);
for (NodeAddr<DefNode*> DA : Ds) {
// When collecting a full chain of definitions, do not consider phi
// defs to actually define a register.
@@ -470,7 +470,7 @@ void Liveness::computePhiInfo() {
NodeList Blocks = FA.Addr->members(DFG);
for (NodeAddr<BlockNode*> BA : Blocks) {
auto Ps = BA.Addr->members_if(DFG.IsCode<NodeAttrs::Phi>, DFG);
- Phis.insert(Phis.end(), Ps.begin(), Ps.end());
+ llvm::append_range(Phis, Ps);
}
// phi use -> (map: reaching phi -> set of registers defined in between)
diff --git a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
index a15229942d63..2f0a622d3846 100644
--- a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
+++ b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
@@ -387,8 +387,7 @@ void ReachingDefAnalysis::getGlobalUses(MachineInstr *MI, MCRegister PhysReg,
if (Visited.count(MBB) || !MBB->isLiveIn(PhysReg))
continue;
if (getLiveInUses(MBB, PhysReg, Uses))
- ToVisit.insert(ToVisit.end(), MBB->successors().begin(),
- MBB->successors().end());
+ llvm::append_range(ToVisit, MBB->successors());
Visited.insert(MBB);
}
}
diff --git a/llvm/lib/CodeGen/RegAllocPBQP.cpp b/llvm/lib/CodeGen/RegAllocPBQP.cpp
index bb2db85a090b..90e9cb5f0238 100644
--- a/llvm/lib/CodeGen/RegAllocPBQP.cpp
+++ b/llvm/lib/CodeGen/RegAllocPBQP.cpp
@@ -652,7 +652,7 @@ void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM,
if (VRegAllowed.empty()) {
SmallVector<Register, 8> NewVRegs;
spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller);
- Worklist.insert(Worklist.end(), NewVRegs.begin(), NewVRegs.end());
+ llvm::append_range(Worklist, NewVRegs);
continue;
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index b2c748167577..6a3995e16822 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1347,7 +1347,7 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
SmallVector<SDValue, 8> Ops;
for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
- Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
+ llvm::append_range(Ops, EltParts);
SDValue V = getNode(ISD::BITCAST, DL, VT, getBuildVector(ViaVecVT, DL, Ops));
return V;
@@ -8767,7 +8767,7 @@ void SelectionDAG::updateDivergence(SDNode *N) {
bool IsDivergent = calculateDivergence(N);
if (N->SDNodeBits.IsDivergent != IsDivergent) {
N->SDNodeBits.IsDivergent = IsDivergent;
- Worklist.insert(Worklist.end(), N->use_begin(), N->use_end());
+ llvm::append_range(Worklist, N->uses());
}
} while (!Worklist.empty());
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index a145eccde74f..42305765b0cf 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -8461,7 +8461,7 @@ void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call) {
InlineAsm::getFlagWord(InlineAsm::Kind_Imm, Ops.size());
AsmNodeOperands.push_back(DAG.getTargetConstant(
ResOpType, getCurSDLoc(), TLI.getPointerTy(DAG.getDataLayout())));
- AsmNodeOperands.insert(AsmNodeOperands.end(), Ops.begin(), Ops.end());
+ llvm::append_range(AsmNodeOperands, Ops);
break;
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 13fb018f9db2..c26dbfa6567c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2094,7 +2094,7 @@ void SelectionDAGISel::SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops,
InlineAsm::getFlagWord(InlineAsm::Kind_Mem, SelOps.size());
NewFlags = InlineAsm::getFlagWordForMem(NewFlags, ConstraintID);
Ops.push_back(CurDAG->getTargetConstant(NewFlags, DL, MVT::i32));
- Ops.insert(Ops.end(), SelOps.begin(), SelOps.end());
+ llvm::append_range(Ops, SelOps);
i += 2;
}
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
index 65ad5b0b5d8f..5638feaf1540 100644
--- a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
@@ -842,7 +842,7 @@ SDValue SelectionDAGBuilder::LowerAsSTATEPOINT(
pushStackMapConstant(Ops, *this, Flags);
// Insert all vmstate and gcstate arguments
- Ops.insert(Ops.end(), LoweredMetaArgs.begin(), LoweredMetaArgs.end());
+ llvm::append_range(Ops, LoweredMetaArgs);
// Add register mask from call node
Ops.push_back(*RegMaskIt);
More information about the llvm-branch-commits
mailing list