[llvm-branch-commits] [llvm] e73f885 - [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8a58f21f5b6c

Nemanja Ivanovic via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Mon Dec 28 07:32:06 PST 2020


Author: Nemanja Ivanovic
Date: 2020-12-28T09:26:51-06:00
New Revision: e73f885c988d7b94fcad64ddfa6a825e15e77a8f

URL: https://github.com/llvm/llvm-project/commit/e73f885c988d7b94fcad64ddfa6a825e15e77a8f
DIFF: https://github.com/llvm/llvm-project/commit/e73f885c988d7b94fcad64ddfa6a825e15e77a8f.diff

LOG: [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8a58f21f5b6c

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrPrefix.td

Removed: 
    


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diff  --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
index e7fa2affb730..2f29811b20d8 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -2561,13 +2561,13 @@ let AddedComplexity = 400, Predicates = [IsISA3_1, IsLittleEndian] in {
   def : Pat<(truncstorei16 (i32 (vector_extract v8i16:$src, 0)), xoaddr:$dst),
             (STXVRHX (COPY_TO_REGCLASS v8i16:$src, VSRC), xoaddr:$dst)>;
   def : Pat<(store (i32 (extractelt v4i32:$src, 0)), xoaddr:$dst),
-            (STXVRWX (COPY_TO_REGCLASS v4i32:$src, VSRC), xoaddr:$dst)>;
+            (STXVRWX $src, xoaddr:$dst)>;
   def : Pat<(store (f32 (extractelt v4f32:$src, 0)), xoaddr:$dst),
-            (STXVRWX (COPY_TO_REGCLASS v4f32:$src, VSRC), xoaddr:$dst)>;
+            (STXVRWX $src, xoaddr:$dst)>;
   def : Pat<(store (i64 (extractelt v2i64:$src, 0)), xoaddr:$dst),
-            (STXVRDX (COPY_TO_REGCLASS v2i64:$src, VSRC), xoaddr:$dst)>;
+            (STXVRDX $src, xoaddr:$dst)>;
   def : Pat<(store (f64 (extractelt v2f64:$src, 0)), xoaddr:$dst),
-            (STXVRDX (COPY_TO_REGCLASS v2f64:$src, VSRC), xoaddr:$dst)>;
+            (STXVRDX $src, xoaddr:$dst)>;
  }
 
 class xxevalPattern <dag pattern, bits<8> imm> :


        


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