[llvm-branch-commits] [llvm] fb77d95 - [AArch64] Fix legalization of i128 ctpop without neon
Nikita Popov via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Dec 27 08:29:33 PST 2020
Author: Nikita Popov
Date: 2020-12-27T17:24:41+01:00
New Revision: fb77d95022198edebde3e4cb2807eaeea2156d85
URL: https://github.com/llvm/llvm-project/commit/fb77d95022198edebde3e4cb2807eaeea2156d85
DIFF: https://github.com/llvm/llvm-project/commit/fb77d95022198edebde3e4cb2807eaeea2156d85.diff
LOG: [AArch64] Fix legalization of i128 ctpop without neon
If neon is disabled, LowerCTPOP will return SDValue() to indicate
that normal legalization should be used. However, ReplaceNodeResults
does not check for this and pushes the empty SDValue() onto the
result vector, which will subsequently result in a crash.
Differential Revision: https://reviews.llvm.org/D93825
Added:
llvm/test/CodeGen/AArch64/ctpop-nonean.ll
Modified:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 48fbea840bad..2012f1247a0f 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -15905,7 +15905,8 @@ void AArch64TargetLowering::ReplaceNodeResults(
return;
case ISD::CTPOP:
- Results.push_back(LowerCTPOP(SDValue(N, 0), DAG));
+ if (SDValue Result = LowerCTPOP(SDValue(N, 0), DAG))
+ Results.push_back(Result);
return;
case AArch64ISD::SADDV:
ReplaceReductionResults(N, Results, DAG, ISD::ADD, AArch64ISD::SADDV);
diff --git a/llvm/test/CodeGen/AArch64/ctpop-nonean.ll b/llvm/test/CodeGen/AArch64/ctpop-nonean.ll
new file mode 100644
index 000000000000..a6cc9c6fa9be
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/ctpop-nonean.ll
@@ -0,0 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=-neon < %s | FileCheck %s
+
+declare i128 @llvm.ctpop.i128(i128)
+
+define i128 @ctpop_i128(i128 %i) {
+; CHECK-LABEL: ctpop_i128:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsr x8, x1, #1
+; CHECK-NEXT: and x8, x8, #0x5555555555555555
+; CHECK-NEXT: sub x8, x1, x8
+; CHECK-NEXT: lsr x10, x0, #1
+; CHECK-NEXT: and x10, x10, #0x5555555555555555
+; CHECK-NEXT: and x11, x8, #0x3333333333333333
+; CHECK-NEXT: lsr x8, x8, #2
+; CHECK-NEXT: sub x10, x0, x10
+; CHECK-NEXT: and x8, x8, #0x3333333333333333
+; CHECK-NEXT: add x8, x11, x8
+; CHECK-NEXT: and x11, x10, #0x3333333333333333
+; CHECK-NEXT: lsr x10, x10, #2
+; CHECK-NEXT: and x10, x10, #0x3333333333333333
+; CHECK-NEXT: add x10, x11, x10
+; CHECK-NEXT: add x8, x8, x8, lsr #4
+; CHECK-NEXT: add x10, x10, x10, lsr #4
+; CHECK-NEXT: mov x9, #72340172838076673
+; CHECK-NEXT: and x8, x8, #0xf0f0f0f0f0f0f0f
+; CHECK-NEXT: and x10, x10, #0xf0f0f0f0f0f0f0f
+; CHECK-NEXT: mul x8, x8, x9
+; CHECK-NEXT: mul x9, x10, x9
+; CHECK-NEXT: lsr x9, x9, #56
+; CHECK-NEXT: add x0, x9, x8, lsr #56
+; CHECK-NEXT: mov x1, xzr
+; CHECK-NEXT: ret
+ %c = call i128 @llvm.ctpop.i128(i128 %i)
+ ret i128 %c
+}
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