[llvm-branch-commits] [llvm] de127d8 - [InstCombine] Add tests for PR48577 (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2020-12-23T21:03:22+01:00
New Revision: de127d83d81228de36c487a6da28502b458e9924

URL: https://github.com/llvm/llvm-project/commit/de127d83d81228de36c487a6da28502b458e9924
DIFF: https://github.com/llvm/llvm-project/commit/de127d83d81228de36c487a6da28502b458e9924.diff

LOG: [InstCombine] Add tests for PR48577 (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/load.ll
    llvm/test/Transforms/InstCombine/store.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/load.ll b/llvm/test/Transforms/InstCombine/load.ll
index 79adbe117333..a6a2155be0b5 100644
--- a/llvm/test/Transforms/InstCombine/load.ll
+++ b/llvm/test/Transforms/InstCombine/load.ll
@@ -57,13 +57,23 @@ define i32 @test5(i1 %C) {
   ret i32 %Z
 }
 
-define i32 @test7(i32 %X) {
-; CHECK-LABEL: @test7(
+define i32 @load_gep_null_inbounds(i64 %X) {
+; CHECK-LABEL: @load_gep_null_inbounds(
 ; CHECK-NEXT:    store i32 undef, i32* null, align 536870912
 ; CHECK-NEXT:    ret i32 undef
 ;
-  %V = getelementptr i32, i32* null, i32 %X		; <i32*> [#uses=1]
-  %R = load i32, i32* %V		; <i32> [#uses=1]
+  %V = getelementptr inbounds i32, i32* null, i64 %X
+  %R = load i32, i32* %V
+  ret i32 %R
+}
+
+define i32 @load_gep_null_not_inbounds(i64 %X) {
+; CHECK-LABEL: @load_gep_null_not_inbounds(
+; CHECK-NEXT:    store i32 undef, i32* null, align 536870912
+; CHECK-NEXT:    ret i32 undef
+;
+  %V = getelementptr i32, i32* null, i64 %X
+  %R = load i32, i32* %V
   ret i32 %R
 }
 

diff  --git a/llvm/test/Transforms/InstCombine/store.ll b/llvm/test/Transforms/InstCombine/store.ll
index 575fb0432d6c..cda08f89501a 100644
--- a/llvm/test/Transforms/InstCombine/store.ll
+++ b/llvm/test/Transforms/InstCombine/store.ll
@@ -23,8 +23,19 @@ define void @test2(i32* %P) {
   ret void
 }
 
-define void @store_at_gep_off_null(i64 %offset) {
-; CHECK-LABEL: @store_at_gep_off_null(
+define void @store_at_gep_off_null_inbounds(i64 %offset) {
+; CHECK-LABEL: @store_at_gep_off_null_inbounds(
+; CHECK-NEXT:    [[PTR:%.*]] = getelementptr inbounds i32, i32* null, i64 [[OFFSET:%.*]]
+; CHECK-NEXT:    store i32 undef, i32* [[PTR]], align 4
+; CHECK-NEXT:    ret void
+;
+  %ptr = getelementptr inbounds i32, i32 *null, i64 %offset
+  store i32 24, i32* %ptr
+  ret void
+}
+
+define void @store_at_gep_off_null_not_inbounds(i64 %offset) {
+; CHECK-LABEL: @store_at_gep_off_null_not_inbounds(
 ; CHECK-NEXT:    [[PTR:%.*]] = getelementptr i32, i32* null, i64 [[OFFSET:%.*]]
 ; CHECK-NEXT:    store i32 undef, i32* [[PTR]], align 4
 ; CHECK-NEXT:    ret void
@@ -36,11 +47,11 @@ define void @store_at_gep_off_null(i64 %offset) {
 
 define void @store_at_gep_off_no_null_opt(i64 %offset) #0 {
 ; CHECK-LABEL: @store_at_gep_off_no_null_opt(
-; CHECK-NEXT:    [[PTR:%.*]] = getelementptr i32, i32* null, i64 [[OFFSET:%.*]]
+; CHECK-NEXT:    [[PTR:%.*]] = getelementptr inbounds i32, i32* null, i64 [[OFFSET:%.*]]
 ; CHECK-NEXT:    store i32 24, i32* [[PTR]], align 4
 ; CHECK-NEXT:    ret void
 ;
-  %ptr = getelementptr i32, i32 *null, i64 %offset
+  %ptr = getelementptr inbounds i32, i32 *null, i64 %offset
   store i32 24, i32* %ptr
   ret void
 }
@@ -130,14 +141,14 @@ define void @test6(i32 %n, float* %a, i32* %gi) nounwind uwtable ssp {
 ; CHECK-NEXT:    br label [[FOR_COND:%.*]]
 ; CHECK:       for.cond:
 ; CHECK-NEXT:    [[STOREMERGE:%.*]] = phi i32 [ 42, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
-; CHECK-NEXT:    store i32 [[STOREMERGE]], i32* [[GI:%.*]], align 4, !tbaa !0
+; CHECK-NEXT:    store i32 [[STOREMERGE]], i32* [[GI:%.*]], align 4, [[TBAA0:!tbaa !.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[STOREMERGE]], [[N:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[IDXPROM:%.*]] = sext i32 [[STOREMERGE]] to i64
 ; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[IDXPROM]]
-; CHECK-NEXT:    store float 0.000000e+00, float* [[ARRAYIDX]], align 4, !tbaa !4
-; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* [[GI]], align 4, !tbaa !0
+; CHECK-NEXT:    store float 0.000000e+00, float* [[ARRAYIDX]], align 4, [[TBAA4:!tbaa !.*]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* [[GI]], align 4, [[TBAA0]]
 ; CHECK-NEXT:    [[INC]] = add nsw i32 [[TMP0]], 1
 ; CHECK-NEXT:    br label [[FOR_COND]]
 ; CHECK:       for.end: