[llvm-branch-commits] [llvm] 5b37f0d - [MCInstrDesc] [TableGen] Reduce size of MCOperandInfo instances.
Paul C. Anagnostopoulos via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Dec 22 06:49:26 PST 2020
Author: Paul C. Anagnostopoulos
Date: 2020-12-22T09:44:30-05:00
New Revision: 5b37f0d97087c39ef635b3f7574ace9aa173d417
URL: https://github.com/llvm/llvm-project/commit/5b37f0d97087c39ef635b3f7574ace9aa173d417
DIFF: https://github.com/llvm/llvm-project/commit/5b37f0d97087c39ef635b3f7574ace9aa173d417.diff
LOG: [MCInstrDesc] [TableGen] Reduce size of MCOperandInfo instances.
Differential Revision: https://reviews.llvm.org/D93326
Added:
Modified:
llvm/include/llvm/MC/MCInstrDesc.h
llvm/utils/TableGen/InstrInfoEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCInstrDesc.h b/llvm/include/llvm/MC/MCInstrDesc.h
index 17454e3134a2..cbb061fc6456 100644
--- a/llvm/include/llvm/MC/MCInstrDesc.h
+++ b/llvm/include/llvm/MC/MCInstrDesc.h
@@ -27,12 +27,22 @@ class MCInst;
//===----------------------------------------------------------------------===//
namespace MCOI {
-// Operand constraints
+/// Operand constraints. These are encoded in 16 bits with one of the
+/// low-order 3 bits specifying that a constraint is present and the
+/// corresponding high-order hex digit specifying the constraint value.
+/// This allows for a maximum of 3 constraints.
enum OperandConstraint {
- TIED_TO = 0, // Must be allocated the same register as.
- EARLY_CLOBBER // Operand is an early clobber register operand
+ TIED_TO = 0, // Must be allocated the same register as specified value.
+ EARLY_CLOBBER // If present, operand is an early clobber register.
};
+// Define a macro to produce each constraint value.
+#define MCOI_TIED_TO(op) \
+ ((1 << MCOI::TIED_TO) | ((op) << (4 + MCOI::TIED_TO * 4)))
+
+#define MCOI_EARLY_CLOBBER \
+ (1 << MCOI::EARLY_CLOBBER)
+
/// These are flags set on operands, but should be considered
/// private, all access should go through the MCOperandInfo accessors.
/// See the accessors for a description of what these are.
@@ -84,10 +94,9 @@ class MCOperandInfo {
/// Information about the type of the operand.
uint8_t OperandType;
- /// The lower 16 bits are used to specify which constraints are set.
- /// The higher 16 bits are used to specify the value of constraints (4 bits
- /// each).
- uint32_t Constraints;
+
+ /// Operand constraints (see OperandConstraint enum).
+ uint16_t Constraints;
/// Set if this operand is a pointer value and it requires a callback
/// to look up its register class.
@@ -197,14 +206,14 @@ class MCInstrDesc {
const MCPhysReg *ImplicitDefs; // Registers implicitly defined by this instr
const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands
- /// Returns the value of the specific constraint if
- /// it is set. Returns -1 if it is not set.
+ /// Returns the value of the specified operand constraint if
+ /// it is present. Returns -1 if it is not present.
int getOperandConstraint(unsigned OpNum,
MCOI::OperandConstraint Constraint) const {
if (OpNum < NumOperands &&
(OpInfo[OpNum].Constraints & (1 << Constraint))) {
- unsigned Pos = 16 + Constraint * 4;
- return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
+ unsigned ValuePos = 4 + Constraint * 4;
+ return (int)(OpInfo[OpNum].Constraints >> ValuePos) & 0x0f;
}
return -1;
}
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 156fa6d18d2e..71d8eadaa61e 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -182,11 +182,10 @@ InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
if (Constraint.isNone())
Res += "0";
else if (Constraint.isEarlyClobber())
- Res += "(1 << MCOI::EARLY_CLOBBER)";
+ Res += "MCOI_EARLY_CLOBBER";
else {
assert(Constraint.isTied());
- Res += "((" + utostr(Constraint.getTiedOperand()) +
- " << 16) | (1 << MCOI::TIED_TO))";
+ Res += "MCOI_TIED_TO(" + utostr(Constraint.getTiedOperand()) + ")";
}
Result.push_back(Res);
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