[llvm-branch-commits] [llvm] 1e785e9 - apply update_test_checks.py to a few files in llvm/test/Transforms/InstCombine
Juneyoung Lee via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sat Dec 19 08:09:35 PST 2020
Author: Juneyoung Lee
Date: 2020-12-20T01:03:19+09:00
New Revision: 1e785e92624b758e0d0bfe0efe3b4e6d1c44d27c
URL: https://github.com/llvm/llvm-project/commit/1e785e92624b758e0d0bfe0efe3b4e6d1c44d27c
DIFF: https://github.com/llvm/llvm-project/commit/1e785e92624b758e0d0bfe0efe3b4e6d1c44d27c.diff
LOG: apply update_test_checks.py to a few files in llvm/test/Transforms/InstCombine
Added:
Modified:
llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
llvm/test/Transforms/InstCombine/bitcast.ll
llvm/test/Transforms/InstCombine/insert-const-shuf.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll b/llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
index 2ee0c3462c19..541156c0137d 100644
--- a/llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
+++ b/llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
@@ -7,7 +7,7 @@
define <2 x i64> @test_extrq_call(<2 x i64> %x, <16 x i8> %y) {
; CHECK-LABEL: @test_extrq_call(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1:#.*]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y) nounwind
@@ -150,7 +150,7 @@ define <2 x i64> @test_extrqi_call_constexpr() {
define <2 x i64> @test_insertq_call(<2 x i64> %x, <2 x i64> %y) {
; CHECK-LABEL: @test_insertq_call(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
@@ -291,7 +291,7 @@ define <2 x i64> @testUndefinedInsertq_3(<2 x i64> %v, <2 x i64> %i) {
define <2 x i64> @test_extrq_arg0(<2 x i64> %x, <16 x i8> %y) {
; CHECK-LABEL: @test_extrq_arg0(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -301,7 +301,7 @@ define <2 x i64> @test_extrq_arg0(<2 x i64> %x, <16 x i8> %y) {
define <2 x i64> @test_extrq_arg1(<2 x i64> %x, <16 x i8> %y) {
; CHECK-LABEL: @test_extrq_arg1(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = shufflevector <16 x i8> %y, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
@@ -311,7 +311,7 @@ define <2 x i64> @test_extrq_arg1(<2 x i64> %x, <16 x i8> %y) {
define <2 x i64> @test_extrq_args01(<2 x i64> %x, <16 x i8> %y) {
; CHECK-LABEL: @test_extrq_args01(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -350,7 +350,7 @@ define <2 x i64> @test_extrqi_ret(<2 x i64> %x) {
define <2 x i64> @test_insertq_arg0(<2 x i64> %x, <2 x i64> %y) {
; CHECK-LABEL: @test_insertq_arg0(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -369,7 +369,7 @@ define <2 x i64> @test_insertq_ret(<2 x i64> %x, <2 x i64> %y) {
define <2 x i64> @test_insertqi_arg0(<2 x i64> %x, <2 x i64> %y) {
; CHECK-LABEL: @test_insertqi_arg0(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -379,7 +379,7 @@ define <2 x i64> @test_insertqi_arg0(<2 x i64> %x, <2 x i64> %y) {
define <2 x i64> @test_insertqi_arg1(<2 x i64> %x, <2 x i64> %y) {
; CHECK-LABEL: @test_insertqi_arg1(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = shufflevector <2 x i64> %y, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -389,7 +389,7 @@ define <2 x i64> @test_insertqi_arg1(<2 x i64> %x, <2 x i64> %y) {
define <2 x i64> @test_insertqi_args01(<2 x i64> %x, <2 x i64> %y) {
; CHECK-LABEL: @test_insertqi_args01(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #1
+; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
diff --git a/llvm/test/Transforms/InstCombine/bitcast.ll b/llvm/test/Transforms/InstCombine/bitcast.ll
index c4ee52f27a8c..3a3da5587d14 100644
--- a/llvm/test/Transforms/InstCombine/bitcast.ll
+++ b/llvm/test/Transforms/InstCombine/bitcast.ll
@@ -75,9 +75,9 @@ define <2 x i32> @or_bitcast_int_to_vec(i64 %a) {
define <2 x i64> @is_negative(<4 x i32> %x) {
; CHECK-LABEL: @is_negative(
-; CHECK-NEXT: [[LOBIT:%.*]] = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
-; CHECK-NEXT: [[NOTNOT:%.*]] = bitcast <4 x i32> [[LOBIT]] to <2 x i64>
-; CHECK-NEXT: ret <2 x i64> [[NOTNOT]]
+; CHECK-NEXT: [[LOBIT:%.*]] = ashr <4 x i32> [[X:%.*]], <i32 31, i32 31, i32 31, i32 31>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[LOBIT]] to <2 x i64>
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
%not = xor <4 x i32> %lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
@@ -91,7 +91,7 @@ define <2 x i64> @is_negative(<4 x i32> %x) {
define <4 x i32> @is_negative_bonus_bitcast(<4 x i32> %x) {
; CHECK-LABEL: @is_negative_bonus_bitcast(
-; CHECK-NEXT: [[LOBIT:%.*]] = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
+; CHECK-NEXT: [[LOBIT:%.*]] = ashr <4 x i32> [[X:%.*]], <i32 31, i32 31, i32 31, i32 31>
; CHECK-NEXT: ret <4 x i32> [[LOBIT]]
;
%lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
@@ -564,6 +564,10 @@ define void @constant_fold_vector_to_half() {
; Ensure that we do not crash when looking at such a weird bitcast.
define i8* @bitcast_from_single_element_pointer_vector_to_pointer(<1 x i8*> %ptrvec) {
+; CHECK-LABEL: @bitcast_from_single_element_pointer_vector_to_pointer(
+; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i8*> [[PTRVEC:%.*]], i32 0
+; CHECK-NEXT: ret i8* [[TMP1]]
+;
%ptr = bitcast <1 x i8*> %ptrvec to i8*
ret i8* %ptr
}
diff --git a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll
index 3e301e336aff..f1f2b650bea9 100644
--- a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll
+++ b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll
@@ -5,7 +5,7 @@
define <4 x float> @PR29126(<4 x float> %x) {
; CHECK-LABEL: @PR29126(
-; CHECK-NEXT: [[INS:%.*]] = shufflevector <4 x float> %x, <4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float 4.200000e+01>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
+; CHECK-NEXT: [[INS:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float 4.200000e+01>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
; CHECK-NEXT: ret <4 x float> [[INS]]
;
%shuf = shufflevector <4 x float> %x, <4 x float> <float undef, float 1.0, float 2.0, float undef>, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
@@ -17,7 +17,7 @@ define <4 x float> @PR29126(<4 x float> %x) {
define <4 x float> @twoInserts(<4 x float> %x) {
; CHECK-LABEL: @twoInserts(
-; CHECK-NEXT: [[INS2:%.*]] = shufflevector <4 x float> %x, <4 x float> <float undef, float 0.000000e+00, float 4.200000e+01, float 1.100000e+01>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
+; CHECK-NEXT: [[INS2:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> <float undef, float 0.000000e+00, float 4.200000e+01, float 1.100000e+01>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
; CHECK-NEXT: ret <4 x float> [[INS2]]
;
%shuf = shufflevector <4 x float> %x, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
@@ -28,8 +28,8 @@ define <4 x float> @twoInserts(<4 x float> %x) {
define <4 x i32> @shuffleRetain(<4 x i32> %base) {
; CHECK-LABEL: @shuffleRetain(
-; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> %base, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 1>, <4 x i32> <i32 1, i32 2, i32 undef, i32 7>
-; CHECK-NEXT: ret <4 x i32> [[SHUF]]
+; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[BASE:%.*]], <4 x i32> <i32 undef, i32 undef, i32 undef, i32 1>, <4 x i32> <i32 1, i32 2, i32 undef, i32 7>
+; CHECK-NEXT: ret <4 x i32> [[SHUF]]
;
%shuf = shufflevector <4 x i32> %base, <4 x i32> <i32 4, i32 3, i32 2, i32 1>, <4 x i32> <i32 1, i32 2, i32 undef, i32 7>
ret <4 x i32> %shuf
@@ -39,7 +39,7 @@ define <4 x i32> @shuffleRetain(<4 x i32> %base) {
define <4 x float> @disguisedSelect(<4 x float> %x) {
; CHECK-LABEL: @disguisedSelect(
-; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> %x, <4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float undef>, <4 x i32> <i32 undef, i32 6, i32 5, i32 3>
+; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float undef>, <4 x i32> <i32 undef, i32 6, i32 5, i32 3>
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 0
; CHECK-NEXT: ret <4 x float> [[INS]]
;
@@ -52,7 +52,7 @@ define <4 x float> @disguisedSelect(<4 x float> %x) {
define <4 x float> @notSelectButNoMaskDifference(<4 x float> %x) {
; CHECK-LABEL: @notSelectButNoMaskDifference(
-; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> %x, <4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float undef>, <4 x i32> <i32 1, i32 5, i32 6, i32 undef>
+; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float undef>, <4 x i32> <i32 1, i32 5, i32 6, i32 undef>
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 3
; CHECK-NEXT: ret <4 x float> [[INS]]
;
@@ -65,7 +65,7 @@ define <4 x float> @notSelectButNoMaskDifference(<4 x float> %x) {
define <4 x float> @tooRisky(<4 x float> %x) {
; CHECK-LABEL: @tooRisky(
-; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> %x, <4 x float> <float 1.000000e+00, float undef, float undef, float undef>, <4 x i32> <i32 1, i32 4, i32 4, i32 undef>
+; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> <float 1.000000e+00, float undef, float undef, float undef>, <4 x i32> <i32 1, i32 4, i32 4, i32 undef>
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 3
; CHECK-NEXT: ret <4 x float> [[INS]]
;
@@ -79,7 +79,7 @@ define <4 x float> @tooRisky(<4 x float> %x) {
define <3 x float> @twoShufUses(<3 x float> %x) {
; CHECK-LABEL: @twoShufUses(
-; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x float> %x, <3 x float> <float undef, float 1.000000e+00, float 2.000000e+00>, <3 x i32> <i32 0, i32 4, i32 5>
+; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x float> [[X:%.*]], <3 x float> <float undef, float 1.000000e+00, float 2.000000e+00>, <3 x i32> <i32 0, i32 4, i32 5>
; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x float> [[SHUF]], float 4.200000e+01, i2 1
; CHECK-NEXT: [[ADD:%.*]] = fadd <3 x float> [[SHUF]], [[INS]]
; CHECK-NEXT: ret <3 x float> [[ADD]]
@@ -94,7 +94,7 @@ define <3 x float> @twoShufUses(<3 x float> %x) {
define <5 x i8> @longerMask(<3 x i8> %x) {
; CHECK-LABEL: @longerMask(
-; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i8> %x, <3 x i8> <i8 undef, i8 1, i8 undef>, <5 x i32> <i32 2, i32 1, i32 4, i32 undef, i32 undef>
+; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i8> [[X:%.*]], <3 x i8> <i8 undef, i8 1, i8 undef>, <5 x i32> <i32 2, i32 1, i32 4, i32 undef, i32 undef>
; CHECK-NEXT: [[INS:%.*]] = insertelement <5 x i8> [[SHUF]], i8 42, i17 4
; CHECK-NEXT: ret <5 x i8> [[INS]]
;
@@ -107,7 +107,7 @@ define <5 x i8> @longerMask(<3 x i8> %x) {
define <3 x i8> @shorterMask(<5 x i8> %x) {
; CHECK-LABEL: @shorterMask(
-; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <5 x i8> %x, <5 x i8> undef, <3 x i32> <i32 undef, i32 1, i32 4>
+; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <5 x i8> [[X:%.*]], <5 x i8> undef, <3 x i32> <i32 undef, i32 1, i32 4>
; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> [[SHUF]], i8 42, i21 0
; CHECK-NEXT: ret <3 x i8> [[INS]]
;
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