[llvm-branch-commits] [llvm] c061cb5 - [gn build] Port 195f44278c4
LLVM GN Syncbot via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sat Dec 19 04:35:28 PST 2020
Author: LLVM GN Syncbot
Date: 2020-12-19T12:25:56Z
New Revision: c061cb521b93ab59ac8fb839a956c8e42204102f
URL: https://github.com/llvm/llvm-project/commit/c061cb521b93ab59ac8fb839a956c8e42204102f
DIFF: https://github.com/llvm/llvm-project/commit/c061cb521b93ab59ac8fb839a956c8e42204102f.diff
LOG: [gn build] Port 195f44278c4
Added:
Modified:
llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
Removed:
################################################################################
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
index 5db4549088fa..27d98ae937c8 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
@@ -89,6 +89,7 @@ static_library("LLVMARMCodeGen") {
"ARMParallelDSP.cpp",
"ARMRegisterBankInfo.cpp",
"ARMRegisterInfo.cpp",
+ "ARMSLSHardening.cpp",
"ARMSelectionDAGInfo.cpp",
"ARMSubtarget.cpp",
"ARMTargetMachine.cpp",
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