[llvm-branch-commits] [mlir] b17a181 - [mlir] Modify linalg loops test to have nested regions
Tres Popp via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Dec 16 16:24:43 PST 2020
Author: Tres Popp
Date: 2020-12-17T01:19:46+01:00
New Revision: b17a18156368549d090496bfe215b17a3f8a1f93
URL: https://github.com/llvm/llvm-project/commit/b17a18156368549d090496bfe215b17a3f8a1f93
DIFF: https://github.com/llvm/llvm-project/commit/b17a18156368549d090496bfe215b17a3f8a1f93.diff
LOG: [mlir] Modify linalg loops test to have nested regions
Differential Revision: https://reviews.llvm.org/D93418
Added:
Modified:
mlir/test/Dialect/Linalg/loops.mlir
Removed:
################################################################################
diff --git a/mlir/test/Dialect/Linalg/loops.mlir b/mlir/test/Dialect/Linalg/loops.mlir
index 5a9d7330f289..7801bf1dbb56 100644
--- a/mlir/test/Dialect/Linalg/loops.mlir
+++ b/mlir/test/Dialect/Linalg/loops.mlir
@@ -1144,14 +1144,18 @@ func @generic_const_init(%arg0: memref<?xf32>) {
indexing_maps = #scalar_access,
library_call = "some_external_fn"
}
-func @scalar_code(%arg0: memref<f32>, %arg1 : memref<f32>, %arg2 : memref<f32>)
+func @scalar_code(%arg0: memref<f32>, %arg1 : memref<f32>, %arg2 : memref<f32>, %arg3 : i1)
{
linalg.generic #scalar_trait
ins(%arg0, %arg1 : memref<f32>, memref<f32>)
outs(%arg2 : memref<f32>) {
^bb(%a : f32, %b : f32, %c : f32) :
- %0 = addf %a, %b : f32
- linalg.yield %0 : f32
+ %result = scf.if %arg3 -> (f32) {
+ scf.yield %a : f32
+ } else {
+ scf.yield %b : f32
+ }
+ linalg.yield %result : f32
}
return
}
@@ -1162,7 +1166,10 @@ func @scalar_code(%arg0: memref<f32>, %arg1 : memref<f32>, %arg2 : memref<f32>)
// CHECKLOOP-NOT: scf.for
// CHECKLOOP: load %[[ARG0]][]
// CHECKLOOP: load %[[ARG1]][]
-// CHECKLOOP: addf
+// CHECKLOOP: scf.if
+// CHECKLOOP: scf.yield
+// CHECKLOOP: else
+// CHECKLOOP: scf.yield
// CHECKLOOP: store %{{.*}}, %[[ARG2]][]
// CHECKPARALLEL-LABEL: @scalar_code
@@ -1172,7 +1179,10 @@ func @scalar_code(%arg0: memref<f32>, %arg1 : memref<f32>, %arg2 : memref<f32>)
// CHECKPARALLEL-NOT: scf.for
// CHECKPARALLEL: load %[[ARG0]][]
// CHECKPARALLEL: load %[[ARG1]][]
-// CHECKPARALLEL: addf
+// CHECKPARALLEL: scf.if
+// CHECKPARALLEL: scf.yield
+// CHECKPARALLEL: else
+// CHECKPARALLEL: scf.yield
// CHECKPARALLEL: store %{{.*}}, %[[ARG2]][]
//----------------------------------------------------------------------------//
More information about the llvm-branch-commits
mailing list