[llvm-branch-commits] [llvm] 46c331b - [VectorCombine] adjust test alignments for better coverage; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-16T16:30:45-05:00
New Revision: 46c331bf26d169326b52079578178ab91e3546c0

URL: https://github.com/llvm/llvm-project/commit/46c331bf26d169326b52079578178ab91e3546c0
DIFF: https://github.com/llvm/llvm-project/commit/46c331bf26d169326b52079578178ab91e3546c0.diff

LOG: [VectorCombine] adjust test alignments for better coverage; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/VectorCombine/X86/load.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/VectorCombine/X86/load.ll b/llvm/test/Transforms/VectorCombine/X86/load.ll
index e8ba175b0235..dee6c5eced91 100644
--- a/llvm/test/Transforms/VectorCombine/X86/load.ll
+++ b/llvm/test/Transforms/VectorCombine/X86/load.ll
@@ -565,16 +565,16 @@ define <8 x i32> @load_v1i32_extract_insert_v8i32_extra_use(<1 x i32>* align 16
 
 ; TODO: Can't safely load the offset vector, but can load+shuffle if it is profitable.
 
-define <8 x i16> @gep1_load_v2i16_extract_insert_v8i16(<2 x i16>* align 16 dereferenceable(16) %p) {
+define <8 x i16> @gep1_load_v2i16_extract_insert_v8i16(<2 x i16>* align 1 dereferenceable(16) %p) {
 ; CHECK-LABEL: @gep1_load_v2i16_extract_insert_v8i16(
 ; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds <2 x i16>, <2 x i16>* [[P:%.*]], i64 1
-; CHECK-NEXT:    [[L:%.*]] = load <2 x i16>, <2 x i16>* [[GEP]], align 2
+; CHECK-NEXT:    [[L:%.*]] = load <2 x i16>, <2 x i16>* [[GEP]], align 8
 ; CHECK-NEXT:    [[S:%.*]] = extractelement <2 x i16> [[L]], i32 0
 ; CHECK-NEXT:    [[R:%.*]] = insertelement <8 x i16> undef, i16 [[S]], i64 0
 ; CHECK-NEXT:    ret <8 x i16> [[R]]
 ;
   %gep = getelementptr inbounds <2 x i16>, <2 x i16>* %p, i64 1
-  %l = load <2 x i16>, <2 x i16>* %gep, align 2
+  %l = load <2 x i16>, <2 x i16>* %gep, align 8
   %s = extractelement <2 x i16> %l, i32 0
   %r = insertelement <8 x i16> undef, i16 %s, i64 0
   ret <8 x i16> %r