[llvm-branch-commits] [mlir] 922d3d5 - [mlir] Allow nested regions in inlineRegionAndEmitStore

Tres Popp via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue Dec 15 12:07:52 PST 2020


Author: Tres Popp
Date: 2020-12-15T21:02:57+01:00
New Revision: 922d3d55220dfcfde1f68d17fddca5680aff9545

URL: https://github.com/llvm/llvm-project/commit/922d3d55220dfcfde1f68d17fddca5680aff9545
DIFF: https://github.com/llvm/llvm-project/commit/922d3d55220dfcfde1f68d17fddca5680aff9545.diff

LOG: [mlir] Allow nested regions in inlineRegionAndEmitStore

This is useful for scalar code that uses for/while loops.
This has also been confirmed to work for representing std.pow as an
scf.for loop on gpus.

Differential Revision: https://reviews.llvm.org/D93308

Added: 
    

Modified: 
    mlir/lib/Dialect/Linalg/Transforms/Loops.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Loops.cpp b/mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
index d4529792624c..3a5b79176959 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
@@ -71,7 +71,6 @@ static void inlineRegionAndEmitStore(OpType op, ArrayRef<Value> indexedValues,
   BlockAndValueMapping map;
   map.map(block.getArguments(), indexedValues);
   for (auto &op : block.without_terminator()) {
-    assert(op.getNumRegions() == 0 && "expected a non-nested region");
     auto *newOp = b.clone(op, map);
     map.map(op.getResults(), newOp->getResults());
   }


        


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