[llvm-branch-commits] [llvm] 1fd1f63 - [amdgpu] Fix a crash case when `V_CNDMASK` could be simplified.

Michael Liao via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Mon Dec 14 10:13:04 PST 2020


Author: Michael Liao
Date: 2020-12-14T13:08:13-05:00
New Revision: 1fd1f638b68ca4a9cf3bd071a7cba0bac0b189c6

URL: https://github.com/llvm/llvm-project/commit/1fd1f638b68ca4a9cf3bd071a7cba0bac0b189c6
DIFF: https://github.com/llvm/llvm-project/commit/1fd1f638b68ca4a9cf3bd071a7cba0bac0b189c6.diff

LOG: [amdgpu] Fix a crash case when `V_CNDMASK` could be simplified.

- Once an instruction is simplified, foldable candidates from it should
  be invalidated or skipped as the operand index is no longer valid.

Differential Revision: https://reviews.llvm.org/D93174

Added: 
    llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir

Modified: 
    llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index 0df893ede7b8..bfba432848d4 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1257,8 +1257,11 @@ void SIFoldOperands::foldInstOperand(MachineInstr &MI,
   for (MachineInstr *Copy : CopiesToReplace)
     Copy->addImplicitDefUseOperands(*MF);
 
+  SmallPtrSet<MachineInstr *, 16> Folded;
   for (FoldCandidate &Fold : FoldList) {
     assert(!Fold.isReg() || Fold.OpToFold);
+    if (Folded.count(Fold.UseMI))
+      continue;
     if (Fold.isReg() && Fold.OpToFold->getReg().isVirtual()) {
       Register Reg = Fold.OpToFold->getReg();
       MachineInstr *DefMI = Fold.OpToFold->getParent();
@@ -1278,7 +1281,8 @@ void SIFoldOperands::foldInstOperand(MachineInstr &MI,
       LLVM_DEBUG(dbgs() << "Folded source from " << MI << " into OpNo "
                         << static_cast<int>(Fold.UseOpNo) << " of "
                         << *Fold.UseMI << '\n');
-      tryFoldInst(TII, Fold.UseMI);
+      if (tryFoldInst(TII, Fold.UseMI))
+        Folded.insert(Fold.UseMI);
     } else if (Fold.isCommuted()) {
       // Restoring instruction's original operand order if fold has failed.
       TII->commuteInstruction(*Fold.UseMI, false);

diff  --git a/llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir b/llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir
new file mode 100644
index 000000000000..a921ce33682c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir
@@ -0,0 +1,20 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=gfx1030 -run-pass si-fold-operands -verify-machineinstrs -o - %s | FileCheck %s
+
+---
+name:            fold_cndmask
+tracksRegLiveness: true
+registers:
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: fold_cndmask
+    ; CHECK: [[DEF:%[0-9]+]]:sreg_32_xm0_xexec = IMPLICIT_DEF
+    ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+    ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
+    %0:sreg_32_xm0_xexec = IMPLICIT_DEF
+    %1:sreg_32 = S_MOV_B32 0
+    %2:vgpr_32 = COPY %1:sreg_32
+    %3:vgpr_32 = V_CNDMASK_B32_e64 0, %1:sreg_32, 0, %2:vgpr_32, %0:sreg_32_xm0_xexec, implicit $exec
+
+...


        


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