[llvm-branch-commits] [llvm] b8c847e - [SLP][Test] Precommit test for D93192
Anton Afanasyev via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Dec 13 22:30:43 PST 2020
Author: Anton Afanasyev
Date: 2020-12-14T09:23:47+03:00
New Revision: b8c847ee731b319c1790ab4410f14933aa59efd5
URL: https://github.com/llvm/llvm-project/commit/b8c847ee731b319c1790ab4410f14933aa59efd5
DIFF: https://github.com/llvm/llvm-project/commit/b8c847ee731b319c1790ab4410f14933aa59efd5.diff
LOG: [SLP][Test] Precommit test for D93192
This test shows failure of combined stores chains vectorization
Added:
llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll b/llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll
new file mode 100644
index 000000000000..63e3178c0278
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll
@@ -0,0 +1,107 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -slp-vectorizer -S -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
+
+define void @foo(i8* %v0, i8* readonly %v1) {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT: [[T0:%.*]] = bitcast i8* [[V0:%.*]] to i32*
+; CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[V1:%.*]] to i32*
+; CHECK-NEXT: [[T02:%.*]] = bitcast i8* [[V0]] to i64*
+; CHECK-NEXT: [[T12:%.*]] = bitcast i8* [[V1]] to i64*
+; CHECK-NEXT: [[T14:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 4
+; CHECK-NEXT: [[T18:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 5
+; CHECK-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 6
+; CHECK-NEXT: [[T26:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 7
+; CHECK-NEXT: [[T142:%.*]] = getelementptr inbounds i64, i64* [[T12]], i64 8
+; CHECK-NEXT: [[T182:%.*]] = getelementptr inbounds i64, i64* [[T12]], i64 9
+; CHECK-NEXT: [[T222:%.*]] = getelementptr inbounds i64, i64* [[T12]], i64 10
+; CHECK-NEXT: [[T262:%.*]] = getelementptr inbounds i64, i64* [[T12]], i64 11
+; CHECK-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 4
+; CHECK-NEXT: [[T25:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
+; CHECK-NEXT: [[T29:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 6
+; CHECK-NEXT: [[T32:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 7
+; CHECK-NEXT: [[T212:%.*]] = getelementptr inbounds i64, i64* [[T02]], i64 8
+; CHECK-NEXT: [[T252:%.*]] = getelementptr inbounds i64, i64* [[T02]], i64 9
+; CHECK-NEXT: [[T292:%.*]] = getelementptr inbounds i64, i64* [[T02]], i64 10
+; CHECK-NEXT: [[T322:%.*]] = getelementptr inbounds i64, i64* [[T02]], i64 11
+; CHECK-NEXT: [[T19:%.*]] = load i32, i32* [[T14]], align 4
+; CHECK-NEXT: [[T23:%.*]] = load i32, i32* [[T18]], align 4
+; CHECK-NEXT: [[T27:%.*]] = load i32, i32* [[T22]], align 4
+; CHECK-NEXT: [[T30:%.*]] = load i32, i32* [[T26]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[T142]] to <2 x i64>*
+; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]], align 8
+; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[T222]] to <2 x i64>*
+; CHECK-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[TMP3]], align 8
+; CHECK-NEXT: [[T20:%.*]] = add nsw i32 [[T19]], 4
+; CHECK-NEXT: [[T24:%.*]] = add nsw i32 [[T23]], 4
+; CHECK-NEXT: [[T28:%.*]] = add nsw i32 [[T27]], 6
+; CHECK-NEXT: [[T31:%.*]] = add nsw i32 [[T30]], 7
+; CHECK-NEXT: [[TMP5:%.*]] = add nsw <2 x i64> [[TMP2]], <i64 4, i64 4>
+; CHECK-NEXT: [[TMP6:%.*]] = add nsw <2 x i64> [[TMP4]], <i64 6, i64 7>
+; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64* [[T212]] to <2 x i64>*
+; CHECK-NEXT: store <2 x i64> [[TMP5]], <2 x i64>* [[TMP7]], align 8
+; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64* [[T292]] to <2 x i64>*
+; CHECK-NEXT: store <2 x i64> [[TMP6]], <2 x i64>* [[TMP8]], align 8
+; CHECK-NEXT: store i32 [[T20]], i32* [[T21]], align 4
+; CHECK-NEXT: store i32 [[T24]], i32* [[T25]], align 4
+; CHECK-NEXT: store i32 [[T28]], i32* [[T29]], align 4
+; CHECK-NEXT: store i32 [[T31]], i32* [[T32]], align 4
+; CHECK-NEXT: ret void
+;
+ %t0 = bitcast i8* %v0 to i32*
+ %t1 = bitcast i8* %v1 to i32*
+
+ %t02 = bitcast i8* %v0 to i64*
+ %t12 = bitcast i8* %v1 to i64*
+
+ %t14 = getelementptr inbounds i32, i32* %t1, i64 4
+ %t18 = getelementptr inbounds i32, i32* %t1, i64 5
+ %t22 = getelementptr inbounds i32, i32* %t1, i64 6
+ %t26 = getelementptr inbounds i32, i32* %t1, i64 7
+
+ %t142 = getelementptr inbounds i64, i64* %t12, i64 8
+ %t182 = getelementptr inbounds i64, i64* %t12, i64 9
+ %t222 = getelementptr inbounds i64, i64* %t12, i64 10
+ %t262 = getelementptr inbounds i64, i64* %t12, i64 11
+
+ %t21 = getelementptr inbounds i32, i32* %t0, i64 4
+ %t25 = getelementptr inbounds i32, i32* %t0, i64 5
+ %t29 = getelementptr inbounds i32, i32* %t0, i64 6
+ %t32 = getelementptr inbounds i32, i32* %t0, i64 7
+
+ %t212 = getelementptr inbounds i64, i64* %t02, i64 8
+ %t252 = getelementptr inbounds i64, i64* %t02, i64 9
+ %t292 = getelementptr inbounds i64, i64* %t02, i64 10
+ %t322 = getelementptr inbounds i64, i64* %t02, i64 11
+
+ %t19 = load i32, i32* %t14, align 4
+ %t23 = load i32, i32* %t18, align 4
+ %t27 = load i32, i32* %t22, align 4
+ %t30 = load i32, i32* %t26, align 4
+
+ %t192 = load i64, i64* %t142, align 8
+ %t232 = load i64, i64* %t182, align 8
+ %t272 = load i64, i64* %t222, align 8
+ %t302 = load i64, i64* %t262, align 8
+
+ %t20 = add nsw i32 %t19, 4
+ %t24 = add nsw i32 %t23, 4
+ %t28 = add nsw i32 %t27, 6
+ %t31 = add nsw i32 %t30, 7
+
+ %t202 = add nsw i64 %t192, 4
+ %t242 = add nsw i64 %t232, 4
+ %t282 = add nsw i64 %t272, 6
+ %t312 = add nsw i64 %t302, 7
+
+ store i64 %t202, i64* %t212, align 8
+ store i64 %t242, i64* %t252, align 8
+ store i64 %t282, i64* %t292, align 8
+ store i64 %t312, i64* %t322, align 8
+
+ store i32 %t20, i32* %t21, align 4
+ store i32 %t24, i32* %t25, align 4
+ store i32 %t28, i32* %t29, align 4
+ store i32 %t31, i32* %t32, align 4
+
+ ret void
+}
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