[llvm-branch-commits] [llvm] 7ea37d2 - [BasicAA] Add extra check in phi-spec-order.ll (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2020-12-11T21:20:51+01:00
New Revision: 7ea37d2f9449320baf3f3c96f2ea8b2d002a9ceb

URL: https://github.com/llvm/llvm-project/commit/7ea37d2f9449320baf3f3c96f2ea8b2d002a9ceb
DIFF: https://github.com/llvm/llvm-project/commit/7ea37d2f9449320baf3f3c96f2ea8b2d002a9ceb.diff

LOG: [BasicAA] Add extra check in phi-spec-order.ll (NFC)

The (scevgep, scevgep5) relation regressed with a patch I was
trying, but wasn't tested.

Added: 
    

Modified: 
    llvm/test/Analysis/BasicAA/phi-spec-order.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Analysis/BasicAA/phi-spec-order.ll b/llvm/test/Analysis/BasicAA/phi-spec-order.ll
index e5d435c09ccc..2ae300dc73f7 100644
--- a/llvm/test/Analysis/BasicAA/phi-spec-order.ll
+++ b/llvm/test/Analysis/BasicAA/phi-spec-order.ll
@@ -5,6 +5,14 @@ target triple = "powerpc64le-unknown-linux"
 @X = external global [16000 x double], align 32
 @Y = external global [16000 x double], align 32
 
+; CHECK: NoAlias: [16000 x double]* %lsr.iv1, [16000 x double]* %lsr.iv4
+; CHECK: NoAlias: <4 x double>* %scevgep11, <4 x double>* %scevgep7
+; CHECK: NoAlias: <4 x double>* %scevgep10, <4 x double>* %scevgep7
+; CHECK: NoAlias: <4 x double>* %scevgep7, <4 x double>* %scevgep9
+; CHECK: NoAlias: <4 x double>* %scevgep11, <4 x double>* %scevgep3
+; CHECK: NoAlias: <4 x double>* %scevgep10, <4 x double>* %scevgep3
+; CHECK: NoAlias: <4 x double>* %scevgep3, <4 x double>* %scevgep9
+; CHECK: NoAlias: double* %scevgep, double* %scevgep5
 define signext i32 @s000() nounwind {
 entry:
   br label %for.cond2.preheader
@@ -18,8 +26,6 @@ for.body4:                                        ; preds = %for.body4, %for.con
  to [16000 x double]*), %for.cond2.preheader ]
   %lsr.iv1 = phi [16000 x double]* [ %i10, %for.body4 ], [ @X, %for.cond2.preheader ]
 
-; CHECK: NoAlias:{{[ \t]+}}[16000 x double]* %lsr.iv1, [16000 x double]* %lsr.iv4
-
   %lsr.iv = phi i32 [ %lsr.iv.next, %for.body4 ], [ 16000, %for.cond2.preheader ]
   %lsr.iv46 = bitcast [16000 x double]* %lsr.iv4 to <4 x double>*
   %lsr.iv12 = bitcast [16000 x double]* %lsr.iv1 to <4 x double>*
@@ -42,13 +48,6 @@ for.body4:                                        ; preds = %for.body4, %for.con
   %scevgep3 = getelementptr <4 x double>, <4 x double>* %lsr.iv12, i64 3
   store <4 x double> %add.12, <4 x double>* %scevgep3, align 32
 
-; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep11, <4 x double>* %scevgep7
-; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep10, <4 x double>* %scevgep7
-; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep7, <4 x double>* %scevgep9
-; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep11, <4 x double>* %scevgep3
-; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep10, <4 x double>* %scevgep3
-; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep3, <4 x double>* %scevgep9
-
   %lsr.iv.next = add i32 %lsr.iv, -16
   %scevgep = getelementptr [16000 x double], [16000 x double]* %lsr.iv1, i64 0, i64 16
   %i10 = bitcast double* %scevgep to [16000 x double]*