[llvm-branch-commits] [llvm] 68dbb77 - [NFC][Test] Add a test to verify the instruction form we got from isel
QingShan Zhang via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Dec 11 02:42:29 PST 2020
Author: QingShan Zhang
Date: 2020-12-11T10:36:46Z
New Revision: 68dbb7789e5388657420afcbdd0f928e4fdfcfb8
URL: https://github.com/llvm/llvm-project/commit/68dbb7789e5388657420afcbdd0f928e4fdfcfb8
DIFF: https://github.com/llvm/llvm-project/commit/68dbb7789e5388657420afcbdd0f928e4fdfcfb8.diff
LOG: [NFC][Test] Add a test to verify the instruction form we got from isel
Added:
llvm/test/CodeGen/PowerPC/ldst-align.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/ldst-align.ll b/llvm/test/CodeGen/PowerPC/ldst-align.ll
new file mode 100644
index 000000000000..129f28191ec7
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/ldst-align.ll
@@ -0,0 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s \
+; RUN: -stop-after=finalize-isel -verify-machineinstrs | FileCheck %s
+define i64 @load(i64* %p) {
+ ; CHECK-LABEL: name: load
+ ; CHECK: bb.0.entry:
+ ; CHECK: liveins: $x3
+ ; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
+ ; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = nuw ADDI8 [[COPY]], 24
+ ; CHECK: [[LDX:%[0-9]+]]:g8rc = LDX $zero8, killed [[ADDI8_]] :: (load 8 from %ir.arrayidx, align 2)
+ ; CHECK: $x3 = COPY [[LDX]]
+ ; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %arrayidx = getelementptr inbounds i64, i64* %p, i64 3
+ %0 = load i64, i64* %arrayidx, align 2
+ ret i64 %0
+}
+
+define void @store(i64* %p) {
+ ; CHECK-LABEL: name: store
+ ; CHECK: bb.0.entry:
+ ; CHECK: liveins: $x3
+ ; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
+ ; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = nuw ADDI8 [[COPY]], 16
+ ; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 9
+ ; CHECK: STDX killed [[LI8_]], $zero8, killed [[ADDI8_]] :: (store 8 into %ir.arrayidx, align 1)
+ ; CHECK: BLR8 implicit $lr8, implicit $rm
+entry:
+ %arrayidx = getelementptr inbounds i64, i64* %p, i64 2
+ store i64 9, i64* %arrayidx, align 1
+ ret void
+}
+
+define void @store_aligned(i64* %p) {
+ ; CHECK-LABEL: name: store_aligned
+ ; CHECK: bb.0.entry:
+ ; CHECK: liveins: $x3
+ ; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
+ ; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 9
+ ; CHECK: STD killed [[LI8_]], 16, [[COPY]] :: (store 8 into %ir.arrayidx, align 4)
+ ; CHECK: BLR8 implicit $lr8, implicit $rm
+entry:
+ %arrayidx = getelementptr inbounds i64, i64* %p, i64 2
+ store i64 9, i64* %arrayidx, align 4
+ ret void
+}
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