[llvm-branch-commits] [mlir] 09f717b - Add sqrt lowering from standard to ROCDL

[Adrian Kuegel via llvm-branch-commits]

Author: Adrian Kuegel
Date: 2020-12-10T09:47:37+01:00
New Revision: 09f717b929ae040ae1bf9e9ec56f6dd4a5dba2f8

URL: https://github.com/llvm/llvm-project/commit/09f717b929ae040ae1bf9e9ec56f6dd4a5dba2f8
DIFF: https://github.com/llvm/llvm-project/commit/09f717b929ae040ae1bf9e9ec56f6dd4a5dba2f8.diff

LOG: Add sqrt lowering from standard to ROCDL

Add a lowering for sqrt from standard dialect to ROCDL.

Differential Revision: https://reviews.llvm.org/D92921

Added: 
    

Modified: 
    mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
    mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
index 7b2e2943ce1f..4d81e2cc1f78 100644
--- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
@@ -72,7 +72,7 @@ struct LowerGpuOpsToROCDLOpsPass
     target.addIllegalDialect<gpu::GPUDialect>();
     target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp,
                         LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op,
-                        LLVM::Log2Op, LLVM::SinOp>();
+                        LLVM::Log2Op, LLVM::SinOp, LLVM::SqrtOp>();
     target.addIllegalOp<FuncOp>();
     target.addLegalDialect<ROCDL::ROCDLDialect>();
     // TODO: Remove once we support replacing non-root ops.
@@ -115,6 +115,8 @@ void mlir::populateGpuToROCDLConversionPatterns(
                                                 "__ocml_log2_f64");
   patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sin_f32",
                                                "__ocml_sin_f64");
+  patterns.insert<OpToFuncCallLowering<SqrtOp>>(converter, "__ocml_sqrt_f32",
+                                                "__ocml_sqrt_f64");
   patterns.insert<OpToFuncCallLowering<TanhOp>>(converter, "__ocml_tanh_f32",
                                                 "__ocml_tanh_f64");
 }

diff  --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
index b17d75fd7afb..759d2f2d2d70 100644
--- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
+++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
@@ -228,6 +228,26 @@ gpu.module @test_module {
 
 // -----
 
+gpu.module @test_module {
+  // CHECK: llvm.func @__ocml_sqrt_f32(!llvm.float) -> !llvm.float
+  // CHECK: llvm.func @__ocml_sqrt_f64(!llvm.double) -> !llvm.double
+  // CHECK-LABEL: func @gpu_sqrt
+  func @gpu_sqrt(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64)
+      -> (f16, f32, f64) {
+    %result16 = std.sqrt %arg_f16 : f16
+    // CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float
+    // CHECK-NEXT: llvm.call @__ocml_sqrt_f32(%{{.*}}) : (!llvm.float) -> !llvm.float
+    // CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half
+    %result32 = std.sqrt %arg_f32 : f32
+    // CHECK: llvm.call @__ocml_sqrt_f32(%{{.*}}) : (!llvm.float) -> !llvm.float
+    %result64 = std.sqrt %arg_f64 : f64
+    // CHECK: llvm.call @__ocml_sqrt_f64(%{{.*}}) : (!llvm.double) -> !llvm.double
+    std.return %result16, %result32, %result64 : f16, f32, f64
+  }
+}
+
+// -----
+
 gpu.module @test_module {
   // CHECK: llvm.func @__ocml_tanh_f32(!llvm.float) -> !llvm.float
   // CHECK: llvm.func @__ocml_tanh_f64(!llvm.double) -> !llvm.double