[llvm-branch-commits] [llvm] 852f4d8 - [Sparc] Remove cast that truncates immediate operands to 32 bits.
Tom Stellard via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Dec 9 17:24:39 PST 2020
Author: Brad Smith
Date: 2020-12-09T20:23:57-05:00
New Revision: 852f4d8eb6d317be0947055c0bb6b4fd6c9aa930
URL: https://github.com/llvm/llvm-project/commit/852f4d8eb6d317be0947055c0bb6b4fd6c9aa930
DIFF: https://github.com/llvm/llvm-project/commit/852f4d8eb6d317be0947055c0bb6b4fd6c9aa930.diff
LOG: [Sparc] Remove cast that truncates immediate operands to 32 bits.
Patch by: Mark Kettenis
Test provided by Jessica Clarke.
Differential Revision: https://reviews.llvm.org/D87210
(cherry picked from commit 9ae95a0f8f1bc9bd9e8eb30a5a9444fbdca5cc29)
Added:
Modified:
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
llvm/test/CodeGen/SPARC/inlineasm-v9.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index 069e43c6f544..7845a18b14c1 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -351,7 +351,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
break;
case MachineOperand::MO_Immediate:
- O << (int)MO.getImm();
+ O << MO.getImm();
break;
case MachineOperand::MO_MachineBasicBlock:
MO.getMBB()->getSymbol()->print(O, MAI);
diff --git a/llvm/test/CodeGen/SPARC/inlineasm-v9.ll b/llvm/test/CodeGen/SPARC/inlineasm-v9.ll
index 53ab114dd8d5..1388c8655ace 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm-v9.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm-v9.ll
@@ -39,3 +39,12 @@ entry:
tail call void asm sideeffect "faddq $0,$1,$2", "{f40},{f40},{f40}"(fp128 0xL0, fp128 0xL0, fp128 0xL0)
ret void
}
+
+;; Ensure that 64-bit immediates aren't truncated
+; CHECK-LABEL: test_large_immediate
+; CHECK: or %o0, %lo(4294967296), %o0
+define i64 @test_large_immediate(i64) {
+entry:
+ %1 = tail call i64 asm "or $0, %lo($1), $0", "=r,i,r"(i64 4294967296, i64 %0)
+ ret i64 %1
+}
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