[llvm-branch-commits] [llvm] fb5b611 - [RISCV] Detect more errors when parsing vsetvli in the assembler
Craig Topper via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Dec 8 11:31:35 PST 2020
Author: Craig Topper
Date: 2020-12-08T11:25:39-08:00
New Revision: fb5b611af917f02337b69727fb8082e1ea3b22d5
URL: https://github.com/llvm/llvm-project/commit/fb5b611af917f02337b69727fb8082e1ea3b22d5
DIFF: https://github.com/llvm/llvm-project/commit/fb5b611af917f02337b69727fb8082e1ea3b22d5.diff
LOG: [RISCV] Detect more errors when parsing vsetvli in the assembler
-Reject an "mf1" lmul
-Make sure tail agnostic is exactly "tu" or "ta" not just that it starts with "tu" or "ta"
-Make sure mask agnostic is exactly "mu" or "ma" not just that it starts with "mu" or "ma"
Differential Revision: https://reviews.llvm.org/D92805
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/test/MC/RISCV/rvv/invalid.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 9245e09a6163..03c62487e2ee 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1622,6 +1622,8 @@ OperandMatchResultTy RISCVAsmParser::parseVTypeI(OperandVector &Operands) {
return MatchOperand_NoMatch;
if (Lmul != 1 && Lmul != 2 && Lmul != 4 && Lmul != 8)
return MatchOperand_NoMatch;
+ if (Fractional && Lmul == 1)
+ return MatchOperand_NoMatch;
getLexer().Lex();
if (!getLexer().is(AsmToken::Comma))
@@ -1631,9 +1633,9 @@ OperandMatchResultTy RISCVAsmParser::parseVTypeI(OperandVector &Operands) {
Name = getLexer().getTok().getIdentifier();
// ta or tu
bool TailAgnostic;
- if (Name.consume_front("ta"))
+ if (Name == "ta")
TailAgnostic = true;
- else if (Name.consume_front("tu"))
+ else if (Name == "tu")
TailAgnostic = false;
else
return MatchOperand_NoMatch;
@@ -1646,9 +1648,9 @@ OperandMatchResultTy RISCVAsmParser::parseVTypeI(OperandVector &Operands) {
Name = getLexer().getTok().getIdentifier();
// ma or mu
bool MaskedoffAgnostic;
- if (Name.consume_front("ma"))
+ if (Name == "ma")
MaskedoffAgnostic = true;
- else if (Name.consume_front("mu"))
+ else if (Name == "mu")
MaskedoffAgnostic = false;
else
return MatchOperand_NoMatch;
diff --git a/llvm/test/MC/RISCV/rvv/invalid.s b/llvm/test/MC/RISCV/rvv/invalid.s
index cadafcb35468..671373050441 100644
--- a/llvm/test/MC/RISCV/rvv/invalid.s
+++ b/llvm/test/MC/RISCV/rvv/invalid.s
@@ -37,6 +37,15 @@ vsetvli a2, a0, e8x,m1,tu,mu
vsetvli a2, a0, e8,m1z,tu,mu
# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
+vsetvli a2, a0, e8,mf1,tu,mu
+# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
+
+vsetvli a2, a0, e8,m1,tu,mut
+# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
+
+vsetvli a2, a0, e8,m1,tut,mu
+# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
+
vadd.vv v1, v3, v2, v4.t
# CHECK-ERROR: operand must be v0.t
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