[llvm-branch-commits] [llvm] 3204282 - [X86] Regenerate addcarry2.ll tests
Simon Pilgrim via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Dec 8 07:41:11 PST 2020
Author: Simon Pilgrim
Date: 2020-12-08T15:36:48Z
New Revision: 3204282a988eb6b8a78ac983c47681726b31d360
URL: https://github.com/llvm/llvm-project/commit/3204282a988eb6b8a78ac983c47681726b31d360
DIFF: https://github.com/llvm/llvm-project/commit/3204282a988eb6b8a78ac983c47681726b31d360.diff
LOG: [X86] Regenerate addcarry2.ll tests
Replace X32 check prefixes with X86 - X32 is generally used for gnux triple tests
Added:
Modified:
llvm/test/CodeGen/X86/addcarry2.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/addcarry2.ll b/llvm/test/CodeGen/X86/addcarry2.ll
index 2fef838e57cf..a4069741e208 100644
--- a/llvm/test/CodeGen/X86/addcarry2.ll
+++ b/llvm/test/CodeGen/X86/addcarry2.ll
@@ -1,22 +1,22 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown --show-mc-encoding | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown-unknown --show-mc-encoding | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown --show-mc-encoding | FileCheck %s --check-prefix=X64
define void @adc_load_store_64_15(i64* inreg %x, i64* inreg %x2, i64 inreg %y) nounwind {
-; X32-LABEL: adc_load_store_64_15:
-; X32: # %bb.0:
-; X32-NEXT: pushl %esi # encoding: [0x56]
-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x08]
-; X32-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
-; X32-NEXT: adcl $0, %esi # encoding: [0x83,0xd6,0x00]
-; X32-NEXT: adcl $15, (%eax) # encoding: [0x83,0x10,0x0f]
-; X32-NEXT: adcl $0, 4(%eax) # encoding: [0x83,0x50,0x04,0x00]
-; X32-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
-; X32-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; X32-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
-; X32-NEXT: movl $0, 4(%edx) # encoding: [0xc7,0x42,0x04,0x00,0x00,0x00,0x00]
-; X32-NEXT: popl %esi # encoding: [0x5e]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_64_15:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi # encoding: [0x56]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x08]
+; X86-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
+; X86-NEXT: adcl $0, %esi # encoding: [0x83,0xd6,0x00]
+; X86-NEXT: adcl $15, (%eax) # encoding: [0x83,0x10,0x0f]
+; X86-NEXT: adcl $0, 4(%eax) # encoding: [0x83,0x50,0x04,0x00]
+; X86-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
+; X86-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; X86-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
+; X86-NEXT: movl $0, 4(%edx) # encoding: [0xc7,0x42,0x04,0x00,0x00,0x00,0x00]
+; X86-NEXT: popl %esi # encoding: [0x5e]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_64_15:
; X64: # %bb.0:
@@ -42,21 +42,21 @@ define void @adc_load_store_64_15(i64* inreg %x, i64* inreg %x2, i64 inreg %y) n
}
define void @adc_load_store_64_0x1000F(i64* inreg %x, i64* inreg %x2, i64 inreg %y) nounwind {
-; X32-LABEL: adc_load_store_64_0x1000F:
-; X32: # %bb.0:
-; X32-NEXT: pushl %esi # encoding: [0x56]
-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x08]
-; X32-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
-; X32-NEXT: adcl $0, %esi # encoding: [0x83,0xd6,0x00]
-; X32-NEXT: adcl $65551, (%eax) # encoding: [0x81,0x10,0x0f,0x00,0x01,0x00]
-; X32-NEXT: # imm = 0x1000F
-; X32-NEXT: adcl $0, 4(%eax) # encoding: [0x83,0x50,0x04,0x00]
-; X32-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
-; X32-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; X32-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
-; X32-NEXT: movl $0, 4(%edx) # encoding: [0xc7,0x42,0x04,0x00,0x00,0x00,0x00]
-; X32-NEXT: popl %esi # encoding: [0x5e]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_64_0x1000F:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi # encoding: [0x56]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x08]
+; X86-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
+; X86-NEXT: adcl $0, %esi # encoding: [0x83,0xd6,0x00]
+; X86-NEXT: adcl $65551, (%eax) # encoding: [0x81,0x10,0x0f,0x00,0x01,0x00]
+; X86-NEXT: # imm = 0x1000F
+; X86-NEXT: adcl $0, 4(%eax) # encoding: [0x83,0x50,0x04,0x00]
+; X86-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
+; X86-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; X86-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
+; X86-NEXT: movl $0, 4(%edx) # encoding: [0xc7,0x42,0x04,0x00,0x00,0x00,0x00]
+; X86-NEXT: popl %esi # encoding: [0x5e]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_64_0x1000F:
; X64: # %bb.0:
@@ -83,20 +83,20 @@ define void @adc_load_store_64_0x1000F(i64* inreg %x, i64* inreg %x2, i64 inreg
}
define void @adc_load_store_64_0x100001000F(i64* inreg %x, i64* inreg %x2, i64 inreg %y) nounwind {
-; X32-LABEL: adc_load_store_64_0x100001000F:
-; X32: # %bb.0:
-; X32-NEXT: pushl %esi # encoding: [0x56]
-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x08]
-; X32-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
-; X32-NEXT: adcl $0, %esi # encoding: [0x83,0xd6,0x00]
-; X32-NEXT: adcl $15, (%eax) # encoding: [0x83,0x10,0x0f]
-; X32-NEXT: adcl $16, 4(%eax) # encoding: [0x83,0x50,0x04,0x10]
-; X32-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
-; X32-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; X32-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
-; X32-NEXT: movl $0, 4(%edx) # encoding: [0xc7,0x42,0x04,0x00,0x00,0x00,0x00]
-; X32-NEXT: popl %esi # encoding: [0x5e]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_64_0x100001000F:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi # encoding: [0x56]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x08]
+; X86-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
+; X86-NEXT: adcl $0, %esi # encoding: [0x83,0xd6,0x00]
+; X86-NEXT: adcl $15, (%eax) # encoding: [0x83,0x10,0x0f]
+; X86-NEXT: adcl $16, 4(%eax) # encoding: [0x83,0x50,0x04,0x10]
+; X86-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
+; X86-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; X86-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
+; X86-NEXT: movl $0, 4(%edx) # encoding: [0xc7,0x42,0x04,0x00,0x00,0x00,0x00]
+; X86-NEXT: popl %esi # encoding: [0x5e]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_64_0x100001000F:
; X64: # %bb.0:
@@ -124,14 +124,14 @@ define void @adc_load_store_64_0x100001000F(i64* inreg %x, i64* inreg %x2, i64 i
}
define void @adc_load_store_32_127(i32* inreg %x, i32* inreg %x2, i32 inreg %y) nounwind {
-; X32-LABEL: adc_load_store_32_127:
-; X32: # %bb.0:
-; X32-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
-; X32-NEXT: adcl $127, (%eax) # encoding: [0x83,0x10,0x7f]
-; X32-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
-; X32-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; X32-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_32_127:
+; X86: # %bb.0:
+; X86-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
+; X86-NEXT: adcl $127, (%eax) # encoding: [0x83,0x10,0x7f]
+; X86-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
+; X86-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; X86-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_32_127:
; X64: # %bb.0:
@@ -164,14 +164,14 @@ define void @adc_load_store_32_127(i32* inreg %x, i32* inreg %x2, i32 inreg %y)
}
define void @adc_load_store_32_128(i32* inreg %x, i32* inreg %x2, i32 inreg %y) nounwind {
-; X32-LABEL: adc_load_store_32_128:
-; X32: # %bb.0:
-; X32-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
-; X32-NEXT: adcl $128, (%eax) # encoding: [0x81,0x10,0x80,0x00,0x00,0x00]
-; X32-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
-; X32-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; X32-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_32_128:
+; X86: # %bb.0:
+; X86-NEXT: addl $1, %ecx # encoding: [0x83,0xc1,0x01]
+; X86-NEXT: adcl $128, (%eax) # encoding: [0x81,0x10,0x80,0x00,0x00,0x00]
+; X86-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
+; X86-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; X86-NEXT: movl %eax, (%edx) # encoding: [0x89,0x02]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_32_128:
; X64: # %bb.0:
@@ -207,15 +207,15 @@ define void @adc_load_store_32_128(i32* inreg %x, i32* inreg %x2, i32 inreg %y)
; larger instructions than mainline DAG Instruction selection.
define void @adc_load_store_8_15(i64 inreg %ca, i64 inreg %cb, i8* inreg %x) nounwind {
-; X32-LABEL: adc_load_store_8_15:
-; X32: # %bb.0:
-; X32-NEXT: pushl %esi # encoding: [0x56]
-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x0c]
-; X32-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
-; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # encoding: [0x13,0x54,0x24,0x08]
-; X32-NEXT: adcb $15, (%esi) # encoding: [0x80,0x16,0x0f]
-; X32-NEXT: popl %esi # encoding: [0x5e]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_8_15:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi # encoding: [0x56]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x0c]
+; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx # encoding: [0x13,0x54,0x24,0x08]
+; X86-NEXT: adcb $15, (%esi) # encoding: [0x80,0x16,0x0f]
+; X86-NEXT: popl %esi # encoding: [0x5e]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_8_15:
; X64: # %bb.0:
@@ -236,15 +236,15 @@ define void @adc_load_store_8_15(i64 inreg %ca, i64 inreg %cb, i8* inreg %x) nou
}
define void @adc_load_store_16_15(i64 inreg %ca, i64 inreg %cb, i16* inreg %x) nounwind {
-; X32-LABEL: adc_load_store_16_15:
-; X32: # %bb.0:
-; X32-NEXT: pushl %esi # encoding: [0x56]
-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x0c]
-; X32-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
-; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # encoding: [0x13,0x54,0x24,0x08]
-; X32-NEXT: adcw $15, (%esi) # encoding: [0x66,0x83,0x16,0x0f]
-; X32-NEXT: popl %esi # encoding: [0x5e]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_16_15:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi # encoding: [0x56]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x0c]
+; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx # encoding: [0x13,0x54,0x24,0x08]
+; X86-NEXT: adcw $15, (%esi) # encoding: [0x66,0x83,0x16,0x0f]
+; X86-NEXT: popl %esi # encoding: [0x5e]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_16_15:
; X64: # %bb.0:
@@ -265,16 +265,16 @@ define void @adc_load_store_16_15(i64 inreg %ca, i64 inreg %cb, i16* inreg %x) n
}
define void @adc_load_store_16_256(i64 inreg %ca, i64 inreg %cb, i16* inreg %x) nounwind {
-; X32-LABEL: adc_load_store_16_256:
-; X32: # %bb.0:
-; X32-NEXT: pushl %esi # encoding: [0x56]
-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x0c]
-; X32-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
-; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # encoding: [0x13,0x54,0x24,0x08]
-; X32-NEXT: adcw $256, (%esi) # encoding: [0x66,0x81,0x16,0x00,0x01]
-; X32-NEXT: # imm = 0x100
-; X32-NEXT: popl %esi # encoding: [0x5e]
-; X32-NEXT: retl # encoding: [0xc3]
+; X86-LABEL: adc_load_store_16_256:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi # encoding: [0x56]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi # encoding: [0x8b,0x74,0x24,0x0c]
+; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx # encoding: [0x13,0x54,0x24,0x08]
+; X86-NEXT: adcw $256, (%esi) # encoding: [0x66,0x81,0x16,0x00,0x01]
+; X86-NEXT: # imm = 0x100
+; X86-NEXT: popl %esi # encoding: [0x5e]
+; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: adc_load_store_16_256:
; X64: # %bb.0:
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