[llvm-branch-commits] [llvm] 6b6c3aa - [test] Add explicit dso_local to function declarations in static relocation model tests
Fangrui Song via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sat Dec 5 14:59:25 PST 2020
Author: Fangrui Song
Date: 2020-12-05T14:54:37-08:00
New Revision: 6b6c3aaeacfdc4a482de4af41719b0a4b50aeadf
URL: https://github.com/llvm/llvm-project/commit/6b6c3aaeacfdc4a482de4af41719b0a4b50aeadf
DIFF: https://github.com/llvm/llvm-project/commit/6b6c3aaeacfdc4a482de4af41719b0a4b50aeadf.diff
LOG: [test] Add explicit dso_local to function declarations in static relocation model tests
They are currently implicit because TargetMachine::shouldAssumeDSOLocal implies
dso_local.
For such function declarations, clang -fno-pic emits the dso_local specifier.
Adding explicit dso_local makes these tests align with the clang behavior and
helps implementing an option to use GOT indirection when taking the address of a
function symbol in -fno-pic (to avoid a canonical PLT entry (SHN_UNDEF with
non-zero st_value)).
Added:
Modified:
llvm/test/CodeGen/AArch64/extern-weak.ll
llvm/test/CodeGen/AArch64/funcptr_cast.ll
llvm/test/CodeGen/AArch64/tagged-globals-static.ll
llvm/test/CodeGen/SystemZ/la-01.ll
llvm/test/CodeGen/X86/add.ll
llvm/test/CodeGen/X86/avx-vzeroupper.ll
llvm/test/CodeGen/X86/avx512-i1test.ll
llvm/test/CodeGen/X86/bmi.ll
llvm/test/CodeGen/X86/bool-zext.ll
llvm/test/CodeGen/X86/btq.ll
llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
llvm/test/CodeGen/X86/cmp.ll
llvm/test/CodeGen/X86/conditional-tailcall.ll
llvm/test/CodeGen/X86/copy-eflags.ll
llvm/test/CodeGen/X86/dagcombine-shifts.ll
llvm/test/CodeGen/X86/fold-rmw-ops.ll
llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
llvm/test/CodeGen/X86/fp-une-cmp.ll
llvm/test/CodeGen/X86/fp128-i128.ll
llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
llvm/test/CodeGen/X86/memcmp-minsize.ll
llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
llvm/test/CodeGen/X86/memcmp-optsize.ll
llvm/test/CodeGen/X86/memcmp-pgso.ll
llvm/test/CodeGen/X86/memcmp.ll
llvm/test/CodeGen/X86/mov-zero-to-xor.ll
llvm/test/CodeGen/X86/musttail-tailcc.ll
llvm/test/CodeGen/X86/neg_cmp.ll
llvm/test/CodeGen/X86/nomerge.ll
llvm/test/CodeGen/X86/peep-test-4.ll
llvm/test/CodeGen/X86/pr37063.ll
llvm/test/CodeGen/X86/pr38865.ll
llvm/test/CodeGen/X86/pr47024.ll
llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
llvm/test/CodeGen/X86/retpoline-external.ll
llvm/test/CodeGen/X86/shrink-compare-pgso.ll
llvm/test/CodeGen/X86/shrink-compare.ll
llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
llvm/test/CodeGen/X86/sibcall-win64.ll
llvm/test/CodeGen/X86/sibcall.ll
llvm/test/CodeGen/X86/sqrt-partial.ll
llvm/test/CodeGen/X86/sse-fcopysign.ll
llvm/test/CodeGen/X86/statepoint-vreg-details.ll
llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
llvm/test/CodeGen/X86/tail-call-deref.ll
llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
llvm/test/CodeGen/X86/tail-opts.ll
llvm/test/CodeGen/X86/tailcall-assume.ll
llvm/test/CodeGen/X86/tailcall-extract.ll
llvm/test/CodeGen/X86/tailcall-tailcc.ll
llvm/test/CodeGen/X86/win64_sibcall.ll
llvm/test/CodeGen/X86/xor-icmp.ll
llvm/test/DebugInfo/X86/live-debug-values-remove-range.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/extern-weak.ll b/llvm/test/CodeGen/AArch64/extern-weak.ll
index 4ea8c2617e6e..0746701c67fc 100644
--- a/llvm/test/CodeGen/AArch64/extern-weak.ll
+++ b/llvm/test/CodeGen/AArch64/extern-weak.ll
@@ -3,7 +3,7 @@
; RUN: llc -mtriple=aarch64-none-linux-gnu -code-model=large -o - %s | FileCheck --check-prefix=CHECK-LARGE %s
; RUN: llc -mtriple=aarch64-none-none-eabi -code-model=tiny -o - %s | FileCheck --check-prefix=CHECK-TINY %s
-declare extern_weak i32 @var()
+declare extern_weak dso_local i32 @var()
define i32()* @foo() {
; The usual ADRP/ADD pair can't be used for a weak reference because it must
diff --git a/llvm/test/CodeGen/AArch64/funcptr_cast.ll b/llvm/test/CodeGen/AArch64/funcptr_cast.ll
index 19a20c8bcf4f..406eccf6324c 100644
--- a/llvm/test/CodeGen/AArch64/funcptr_cast.ll
+++ b/llvm/test/CodeGen/AArch64/funcptr_cast.ll
@@ -12,4 +12,4 @@ entry:
ret i8 %0
}
-declare void @foo(...)
+declare dso_local void @foo(...)
diff --git a/llvm/test/CodeGen/AArch64/tagged-globals-static.ll b/llvm/test/CodeGen/AArch64/tagged-globals-static.ll
index ba8bc26ffee1..ed5597c0c3ca 100644
--- a/llvm/test/CodeGen/AArch64/tagged-globals-static.ll
+++ b/llvm/test/CodeGen/AArch64/tagged-globals-static.ll
@@ -8,7 +8,7 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-android"
@global = external dso_local global i32
-declare void @func()
+declare dso_local void @func()
define i32* @global_addr() #0 {
; Static relocation model has common codegen between SelectionDAGISel and
diff --git a/llvm/test/CodeGen/SystemZ/la-01.ll b/llvm/test/CodeGen/SystemZ/la-01.ll
index 303d057ea0ff..bbe1c9d8354f 100644
--- a/llvm/test/CodeGen/SystemZ/la-01.ll
+++ b/llvm/test/CodeGen/SystemZ/la-01.ll
@@ -10,12 +10,12 @@
@e1 = external dso_local global i32, align 1
@d1 = global i32 1, align 1
-declare void @ef()
+declare dso_local void @ef()
define void @df() {
ret void
}
-declare void @foo(i32 *)
+declare dso_local void @foo(i32 *)
; Test a load of a fully-aligned external variable.
define i32 *@f1() {
diff --git a/llvm/test/CodeGen/X86/add.ll b/llvm/test/CodeGen/X86/add.ll
index 9785ae21ecfc..f5db212fe197 100644
--- a/llvm/test/CodeGen/X86/add.ll
+++ b/llvm/test/CodeGen/X86/add.ll
@@ -553,8 +553,8 @@ define i32 @add_to_sub(i32 %a, i32 %b) {
ret i32 %r
}
-declare void @bar_i32(i32)
-declare void @bar_i64(i64)
+declare dso_local void @bar_i32(i32)
+declare dso_local void @bar_i64(i64)
; Make sure we can use sub -128 for add 128 when the flags are used.
define void @add_i32_128_flag(i32 %x) {
diff --git a/llvm/test/CodeGen/X86/avx-vzeroupper.ll b/llvm/test/CodeGen/X86/avx-vzeroupper.ll
index 69e893ea5510..f46b3503d883 100644
--- a/llvm/test/CodeGen/X86/avx-vzeroupper.ll
+++ b/llvm/test/CodeGen/X86/avx-vzeroupper.ll
@@ -5,10 +5,10 @@
; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=ALL,BDVER2
; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=ALL,BTVER2
-declare i32 @foo()
-declare <4 x float> @do_sse(<4 x float>)
-declare <8 x float> @do_avx(<8 x float>)
-declare <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float>, i8) nounwind readnone
+declare dso_local i32 @foo()
+declare dso_local <4 x float> @do_sse(<4 x float>)
+declare dso_local <8 x float> @do_avx(<8 x float>)
+declare dso_local <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float>, i8) nounwind readnone
@x = common global <4 x float> zeroinitializer, align 16
@g = common global <8 x float> zeroinitializer, align 32
diff --git a/llvm/test/CodeGen/X86/avx512-i1test.ll b/llvm/test/CodeGen/X86/avx512-i1test.ll
index 8813c14569c9..8782fad9b0c7 100644
--- a/llvm/test/CodeGen/X86/avx512-i1test.ll
+++ b/llvm/test/CodeGen/X86/avx512-i1test.ll
@@ -91,4 +91,4 @@ return: ; preds = %if.end, %if.then
ret i64 %or.sink
}
-declare i64 @bar()
+declare dso_local i64 @bar()
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll
index 26d2c69c40e6..cbb6ecfd7db0 100644
--- a/llvm/test/CodeGen/X86/bmi.ll
+++ b/llvm/test/CodeGen/X86/bmi.ll
@@ -1243,7 +1243,7 @@ define i64 @blsi64_branch(i64 %x) {
ret i64 %tmp2
}
-declare void @bar()
+declare dso_local void @bar()
define void @pr42118_i32(i32 %x) {
; X86-LABEL: pr42118_i32:
diff --git a/llvm/test/CodeGen/X86/bool-zext.ll b/llvm/test/CodeGen/X86/bool-zext.ll
index 82b6a993ac22..cbc259c235b1 100644
--- a/llvm/test/CodeGen/X86/bool-zext.ll
+++ b/llvm/test/CodeGen/X86/bool-zext.ll
@@ -57,6 +57,6 @@ define zeroext i1 @bar3() nounwind ssp {
ret i1 %call
}
-declare i32 @foo1(...)
+declare dso_local i32 @foo1(...)
declare zeroext i1 @foo2()
diff --git a/llvm/test/CodeGen/X86/btq.ll b/llvm/test/CodeGen/X86/btq.ll
index 1a17de177158..33ff5a8d57fa 100644
--- a/llvm/test/CodeGen/X86/btq.ll
+++ b/llvm/test/CodeGen/X86/btq.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-declare void @bar()
+declare dso_local void @bar()
define void @test1(i64 %foo) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll b/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
index c978ac3ced23..3b3995891e90 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
@@ -137,14 +137,14 @@ cleanup: ; preds = %if.else, %if.then20
ret void
}
-declare i32 @c()
+declare dso_local i32 @c()
-declare i32 @l(i32*)
+declare dso_local i32 @l(i32*)
-declare i32 @m(i64)
+declare dso_local i32 @m(i64)
-declare i32 @i(i32)
+declare dso_local i32 @i(i32)
-declare i32 @k(i32, i64, i32*, i64)
+declare dso_local i32 @k(i32, i64, i32*, i64)
!0 = !{!"branch_weights", i32 2000, i32 1}
diff --git a/llvm/test/CodeGen/X86/cmp.ll b/llvm/test/CodeGen/X86/cmp.ll
index 5f63223e69b8..1fe1fc05077a 100644
--- a/llvm/test/CodeGen/X86/cmp.ll
+++ b/llvm/test/CodeGen/X86/cmp.ll
@@ -138,7 +138,7 @@ bb12:
ret i32 32
}
-declare i32 @foo(...)
+declare dso_local i32 @foo(...)
define i32 @test6() nounwind align 2 {
; CHECK-LABEL: test6:
@@ -266,7 +266,7 @@ F:
ret i32 2
}
-declare zeroext i1 @test12b()
+declare dso_local zeroext i1 @test12b()
define i32 @test13(i32 %mask, i32 %base, i32 %intra) {
; CHECK-LABEL: test13:
@@ -518,7 +518,7 @@ return: ; preds = %if.end, %if.then
ret i32 %retval.0
}
-declare i32 @g()
+declare dso_local i32 @g()
-declare i32 @f()
+declare dso_local i32 @f()
diff --git a/llvm/test/CodeGen/X86/conditional-tailcall.ll b/llvm/test/CodeGen/X86/conditional-tailcall.ll
index 6c5e0643a8ca..3c2903c0071a 100644
--- a/llvm/test/CodeGen/X86/conditional-tailcall.ll
+++ b/llvm/test/CodeGen/X86/conditional-tailcall.ll
@@ -3,8 +3,8 @@
; RUN: llc < %s -mtriple=x86_64-linux -show-mc-encoding | FileCheck %s --check-prefix=CHECK64
; RUN: llc < %s -mtriple=x86_64-win32 -show-mc-encoding | FileCheck %s --check-prefix=WIN64
-declare void @foo()
-declare void @bar()
+declare dso_local void @foo()
+declare dso_local void @bar()
define void @f(i32 %x, i32 %y) optsize {
; CHECK32-LABEL: f:
@@ -141,7 +141,7 @@ bb2:
}
-declare x86_thiscallcc zeroext i1 @baz(i8*, i32)
+declare dso_local x86_thiscallcc zeroext i1 @baz(i8*, i32)
define x86_thiscallcc zeroext i1 @BlockPlacementTest(i8* %this, i32 %x) optsize {
; CHECK32-LABEL: BlockPlacementTest:
; CHECK32: # %bb.0: # %entry
@@ -226,7 +226,7 @@ land.end:
%"class.std::basic_string" = type { %"struct.std::basic_string<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider" }
%"struct.std::basic_string<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider" = type { i8* }
-declare zeroext i1 @_Z20isValidIntegerSuffixN9__gnu_cxx17__normal_iteratorIPKcSsEES3_(i8*, i8*)
+declare dso_local zeroext i1 @_Z20isValidIntegerSuffixN9__gnu_cxx17__normal_iteratorIPKcSsEES3_(i8*, i8*)
define zeroext i1 @pr31257(%"class.std::basic_string"* nocapture readonly dereferenceable(8) %s) minsize {
; CHECK32-LABEL: pr31257:
diff --git a/llvm/test/CodeGen/X86/copy-eflags.ll b/llvm/test/CodeGen/X86/copy-eflags.ll
index cd1c7227e3fe..707faf939e55 100644
--- a/llvm/test/CodeGen/X86/copy-eflags.ll
+++ b/llvm/test/CodeGen/X86/copy-eflags.ll
@@ -10,7 +10,7 @@
@d = common global i8 0, align 1
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
-declare void @external(i32)
+declare dso_local void @external(i32)
; A test that re-uses flags in interesting ways due to volatile accesses.
; Specifically, the first increment's flags are reused for the branch despite
@@ -142,8 +142,8 @@ else:
ret i32 0
}
-declare void @external_a()
-declare void @external_b()
+declare dso_local void @external_a()
+declare dso_local void @external_b()
; This lowers to a conditional tail call instead of a conditional branch. This
; is tricky because we can only do this from a leaf function, and so we have to
diff --git a/llvm/test/CodeGen/X86/dagcombine-shifts.ll b/llvm/test/CodeGen/X86/dagcombine-shifts.ll
index d8996251e9aa..76fc763b24a5 100644
--- a/llvm/test/CodeGen/X86/dagcombine-shifts.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-shifts.ll
@@ -213,5 +213,5 @@ define void @g(i32 %a) {
ret void
}
-declare void @f(i64)
+declare dso_local void @f(i64)
diff --git a/llvm/test/CodeGen/X86/fold-rmw-ops.ll b/llvm/test/CodeGen/X86/fold-rmw-ops.ll
index 52db7916c27e..04d73c7ac78d 100644
--- a/llvm/test/CodeGen/X86/fold-rmw-ops.ll
+++ b/llvm/test/CodeGen/X86/fold-rmw-ops.ll
@@ -8,8 +8,8 @@ target triple = "x86_64-unknown-unknown"
@g16 = external dso_local global i16, align 2
@g8 = external dso_local global i8, align 1
-declare void @a()
-declare void @b()
+declare dso_local void @a()
+declare dso_local void @b()
define void @add64_imm32_br() nounwind {
; CHECK-LABEL: add64_imm32_br:
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
index a7291aeea6af..9b28e05cefc5 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
@@ -4212,7 +4212,7 @@ define void @foo(float %0, float %1) #0 {
5: ; preds = %4, %2
ret void
}
-declare void @bar()
+declare dso_local void @bar()
attributes #0 = { strictfp }
diff --git a/llvm/test/CodeGen/X86/fp-une-cmp.ll b/llvm/test/CodeGen/X86/fp-une-cmp.ll
index 9d208dc97e8a..bd82ca8719fa 100644
--- a/llvm/test/CodeGen/X86/fp-une-cmp.ll
+++ b/llvm/test/CodeGen/X86/fp-une-cmp.ll
@@ -130,6 +130,6 @@ for.end:
br i1 %tobool, label %for.cond, label %for.cond1
}
-declare void @a()
+declare dso_local void @a()
!1 = !{!"branch_weights", i32 1, i32 1000}
diff --git a/llvm/test/CodeGen/X86/fp128-i128.ll b/llvm/test/CodeGen/X86/fp128-i128.ll
index 8d9d8dc5d719..58af70d5d0b1 100644
--- a/llvm/test/CodeGen/X86/fp128-i128.ll
+++ b/llvm/test/CodeGen/X86/fp128-i128.ll
@@ -417,7 +417,7 @@ entry:
ret fp128 %cond
}
-declare void @foo(fp128) #1
+declare dso_local void @foo(fp128) #1
; Test logical operations on fp128 values.
define fp128 @TestFABS_LD(fp128 %x) #0 {
diff --git a/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll b/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
index 41518cd87228..57bfca2ac072 100644
--- a/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
+++ b/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
@@ -3,7 +3,7 @@
;
; Note that a lot of this code was lifted from retpoline.ll.
-declare void @bar(i32)
+declare dso_local void @bar(i32)
; Test a simple indirect call and tail call.
define void @icall_reg(void (i32)* %fp, i32 %x) {
@@ -90,7 +90,7 @@ define void @vcall(%struct.Foo* %obj) #0 {
; X64FAST: jmp __llvm_lvi_thunk_r11 # TAILCALL
-declare void @direct_callee()
+declare dso_local void @direct_callee()
define void @direct_tail() #0 {
tail call void @direct_callee()
diff --git a/llvm/test/CodeGen/X86/memcmp-minsize.ll b/llvm/test/CodeGen/X86/memcmp-minsize.ll
index 21957921ff08..f6b74ec77378 100644
--- a/llvm/test/CodeGen/X86/memcmp-minsize.ll
+++ b/llvm/test/CodeGen/X86/memcmp-minsize.ll
@@ -10,7 +10,7 @@
@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1
-declare i32 @memcmp(i8*, i8*, i64)
+declare dso_local i32 @memcmp(i8*, i8*, i64)
define i32 @length2(i8* %X, i8* %Y) nounwind minsize {
; X86-LABEL: length2:
diff --git a/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll b/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
index fe4753584b5b..fd42ad3c10f5 100644
--- a/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
+++ b/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
@@ -20,7 +20,7 @@
@.str = private constant [513 x i8] c"01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901\00", align 1
-declare i32 @memcmp(i8*, i8*, i64)
+declare dso_local i32 @memcmp(i8*, i8*, i64)
define i32 @length0(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length0:
diff --git a/llvm/test/CodeGen/X86/memcmp-optsize.ll b/llvm/test/CodeGen/X86/memcmp-optsize.ll
index 594a4a68dac0..151baf7de9eb 100644
--- a/llvm/test/CodeGen/X86/memcmp-optsize.ll
+++ b/llvm/test/CodeGen/X86/memcmp-optsize.ll
@@ -10,8 +10,8 @@
@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1
-declare i32 @memcmp(i8*, i8*, i64)
-declare i32 @bcmp(i8*, i8*, i64)
+declare dso_local i32 @memcmp(i8*, i8*, i64)
+declare dso_local i32 @bcmp(i8*, i8*, i64)
define i32 @length2(i8* %X, i8* %Y) nounwind optsize {
; X86-LABEL: length2:
diff --git a/llvm/test/CodeGen/X86/memcmp-pgso.ll b/llvm/test/CodeGen/X86/memcmp-pgso.ll
index 75e9f5975d95..138e7ff0e788 100644
--- a/llvm/test/CodeGen/X86/memcmp-pgso.ll
+++ b/llvm/test/CodeGen/X86/memcmp-pgso.ll
@@ -10,8 +10,8 @@
@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1
-declare i32 @memcmp(i8*, i8*, i64)
-declare i32 @bcmp(i8*, i8*, i64)
+declare dso_local i32 @memcmp(i8*, i8*, i64)
+declare dso_local i32 @bcmp(i8*, i8*, i64)
define i32 @length2(i8* %X, i8* %Y) nounwind !prof !14 {
; X86-LABEL: length2:
diff --git a/llvm/test/CodeGen/X86/memcmp.ll b/llvm/test/CodeGen/X86/memcmp.ll
index 85f0fd182ab6..bd9ca2d573c5 100644
--- a/llvm/test/CodeGen/X86/memcmp.ll
+++ b/llvm/test/CodeGen/X86/memcmp.ll
@@ -19,7 +19,7 @@
@.str = private constant [513 x i8] c"01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901\00", align 1
-declare i32 @memcmp(i8*, i8*, i64)
+declare dso_local i32 @memcmp(i8*, i8*, i64)
define i32 @length0(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length0:
diff --git a/llvm/test/CodeGen/X86/mov-zero-to-xor.ll b/llvm/test/CodeGen/X86/mov-zero-to-xor.ll
index 82cb1247524f..9a34f073199c 100644
--- a/llvm/test/CodeGen/X86/mov-zero-to-xor.ll
+++ b/llvm/test/CodeGen/X86/mov-zero-to-xor.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
-declare void @foo(i64, i64, i64, i64, i64, i64)
-declare void @bar(i32, i32, i32, i32, i32)
+declare dso_local void @foo(i64, i64, i64, i64, i64, i64)
+declare dso_local void @bar(i32, i32, i32, i32, i32)
define void @pr47024() {
; CHECK-LABEL: pr47024:
diff --git a/llvm/test/CodeGen/X86/musttail-tailcc.ll b/llvm/test/CodeGen/X86/musttail-tailcc.ll
index 4de8d4e2be12..9413e6aa45f5 100644
--- a/llvm/test/CodeGen/X86/musttail-tailcc.ll
+++ b/llvm/test/CodeGen/X86/musttail-tailcc.ll
@@ -4,7 +4,7 @@
; tailcc will turn all of these musttail calls into tail calls.
-declare tailcc i32 @tailcallee(i32 %a1, i32 %a2)
+declare dso_local tailcc i32 @tailcallee(i32 %a1, i32 %a2)
define tailcc i32 @tailcaller(i32 %in1, i32 %in2) nounwind {
; X64-LABEL: tailcaller:
@@ -19,7 +19,7 @@ entry:
ret i32 %tmp11
}
-declare tailcc i8* @alias_callee()
+declare dso_local tailcc i8* @alias_callee()
define tailcc noalias i8* @noalias_caller() nounwind {
; X64-LABEL: noalias_caller:
@@ -33,7 +33,7 @@ define tailcc noalias i8* @noalias_caller() nounwind {
ret i8* %p
}
-declare tailcc noalias i8* @noalias_callee()
+declare dso_local tailcc noalias i8* @noalias_callee()
define tailcc i8* @alias_caller() nounwind {
; X64-LABEL: alias_caller:
diff --git a/llvm/test/CodeGen/X86/neg_cmp.ll b/llvm/test/CodeGen/X86/neg_cmp.ll
index 47fa7fbb88f0..2d4784cc7adf 100644
--- a/llvm/test/CodeGen/X86/neg_cmp.ll
+++ b/llvm/test/CodeGen/X86/neg_cmp.ll
@@ -4,7 +4,7 @@
; rdar://11245199
; PR12545
-declare void @g()
+declare dso_local void @g()
define void @neg_cmp(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: neg_cmp:
diff --git a/llvm/test/CodeGen/X86/nomerge.ll b/llvm/test/CodeGen/X86/nomerge.ll
index 8da27f79db90..4b845ce430ce 100644
--- a/llvm/test/CodeGen/X86/nomerge.ll
+++ b/llvm/test/CodeGen/X86/nomerge.ll
@@ -20,7 +20,7 @@ if.end3:
ret void
}
-declare void @bar()
+declare dso_local void @bar()
attributes #0 = { nomerge }
diff --git a/llvm/test/CodeGen/X86/peep-test-4.ll b/llvm/test/CodeGen/X86/peep-test-4.ll
index 788f8fdbc7b7..9406ea7d14e5 100644
--- a/llvm/test/CodeGen/X86/peep-test-4.ll
+++ b/llvm/test/CodeGen/X86/peep-test-4.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+bmi2,+popcnt,+lzcnt | FileCheck %s
-declare void @foo(i32)
-declare void @foo32(i32)
-declare void @foo64(i64)
+declare dso_local void @foo(i32)
+declare dso_local void @foo32(i32)
+declare dso_local void @foo64(i64)
define void @neg(i32 %x) nounwind {
; CHECK-LABEL: neg:
diff --git a/llvm/test/CodeGen/X86/pr37063.ll b/llvm/test/CodeGen/X86/pr37063.ll
index f7f8d622da55..8baa0e7558bc 100644
--- a/llvm/test/CodeGen/X86/pr37063.ll
+++ b/llvm/test/CodeGen/X86/pr37063.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-declare void @bar()
+declare dso_local void @bar()
define void @foo(i64*) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr38865.ll b/llvm/test/CodeGen/X86/pr38865.ll
index 83d48b5aa829..489485274cdb 100644
--- a/llvm/test/CodeGen/X86/pr38865.ll
+++ b/llvm/test/CodeGen/X86/pr38865.ll
@@ -42,6 +42,6 @@ entry:
ret void
}
-declare void @d(%struct.a* byval(%struct.a) align 8) local_unnamed_addr #1
+declare dso_local void @d(%struct.a* byval(%struct.a) align 8) local_unnamed_addr #1
-declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
+declare dso_local void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
diff --git a/llvm/test/CodeGen/X86/pr47024.ll b/llvm/test/CodeGen/X86/pr47024.ll
index 936829a394f2..230c98680162 100644
--- a/llvm/test/CodeGen/X86/pr47024.ll
+++ b/llvm/test/CodeGen/X86/pr47024.ll
@@ -15,4 +15,4 @@ define void @_Z4testv() {
ret void
}
-declare void @_Z8process36data_tS_S_(i64, i64, i64, i64, i64, i64)
+declare dso_local void @_Z8process36data_tS_S_(i64, i64, i64, i64, i64, i64)
diff --git a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
index 16dcea56a0d4..e9210f89257c 100644
--- a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
+++ b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
@@ -94,11 +94,11 @@ ret i32 0
declare i32 @printf(i8* nocapture, ...) nounwind
-declare void @free(i8* nocapture) nounwind
+declare dso_local void @free(i8* nocapture) nounwind
%struct.obj2 = type { i64, i32, i16, i8 }
-declare void @other(%struct.obj2* ) nounwind;
+declare dso_local void @other(%struct.obj2* ) nounwind;
define void @example_dec(%struct.obj2* %o) nounwind uwtable ssp {
; 64 bit dec
@@ -255,7 +255,7 @@ if.end:
ret void
}
-declare void @baz()
+declare dso_local void @baz()
; Avoid creating a cycle in the DAG which would trigger an assert in the
; scheduler.
diff --git a/llvm/test/CodeGen/X86/retpoline-external.ll b/llvm/test/CodeGen/X86/retpoline-external.ll
index c7f297462529..d099ce506abf 100644
--- a/llvm/test/CodeGen/X86/retpoline-external.ll
+++ b/llvm/test/CodeGen/X86/retpoline-external.ll
@@ -4,7 +4,7 @@
; RUN: llc -verify-machineinstrs -mtriple=i686-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86
; RUN: llc -verify-machineinstrs -mtriple=i686-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86FAST
-declare void @bar(i32)
+declare dso_local void @bar(i32)
; Test a simple indirect call and tail call.
define void @icall_reg(void (i32)* %fp, i32 %x) #0 {
@@ -139,7 +139,7 @@ define void @vcall(%struct.Foo* %obj) #0 {
; X86FAST: jmp __x86_indirect_thunk_eax # TAILCALL
-declare void @direct_callee()
+declare dso_local void @direct_callee()
define void @direct_tail() #0 {
tail call void @direct_callee()
diff --git a/llvm/test/CodeGen/X86/shrink-compare-pgso.ll b/llvm/test/CodeGen/X86/shrink-compare-pgso.ll
index 337f7d11e954..8f1bbdb0bf4e 100644
--- a/llvm/test/CodeGen/X86/shrink-compare-pgso.ll
+++ b/llvm/test/CodeGen/X86/shrink-compare-pgso.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-declare void @bar()
+declare dso_local void @bar()
define void @test1(i32* nocapture %X) nounwind !prof !14 {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/shrink-compare.ll b/llvm/test/CodeGen/X86/shrink-compare.ll
index 9c50a35dd839..1929c01c5904 100644
--- a/llvm/test/CodeGen/X86/shrink-compare.ll
+++ b/llvm/test/CodeGen/X86/shrink-compare.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-declare void @bar()
+declare dso_local void @bar()
define void @test1(i32* nocapture %X) nounwind minsize {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll b/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
index ced7fdbf262d..5ede0b2abdfd 100644
--- a/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
+++ b/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
@@ -7,7 +7,7 @@
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-declare i32 @fn()
+declare dso_local i32 @fn()
; Function Attrs: uwtable
define i32 @test1(i32 %v) {
diff --git a/llvm/test/CodeGen/X86/sibcall-win64.ll b/llvm/test/CodeGen/X86/sibcall-win64.ll
index b9d5a4813e09..07249e551844 100644
--- a/llvm/test/CodeGen/X86/sibcall-win64.ll
+++ b/llvm/test/CodeGen/X86/sibcall-win64.ll
@@ -1,11 +1,11 @@
; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
-declare win64cc void @win64_callee(i32)
-declare win64cc void (i32)* @win64_indirect()
-declare win64cc void @win64_other(i32)
-declare void @sysv_callee(i32)
-declare void (i32)* @sysv_indirect()
-declare void @sysv_other(i32)
+declare dso_local win64cc void @win64_callee(i32)
+declare dso_local win64cc void (i32)* @win64_indirect()
+declare dso_local win64cc void @win64_other(i32)
+declare dso_local void @sysv_callee(i32)
+declare dso_local void (i32)* @sysv_indirect()
+declare dso_local void @sysv_other(i32)
define void @sysv_caller(i32 %p1) {
entry:
diff --git a/llvm/test/CodeGen/X86/sibcall.ll b/llvm/test/CodeGen/X86/sibcall.ll
index 2e3a57cb9821..de2509cc4c1c 100644
--- a/llvm/test/CodeGen/X86/sibcall.ll
+++ b/llvm/test/CodeGen/X86/sibcall.ll
@@ -19,7 +19,7 @@ define void @t1(i32 %x) nounwind ssp {
ret void
}
-declare void @foo()
+declare dso_local void @foo()
define void @t2() nounwind ssp {
; X86-LABEL: t2:
@@ -37,7 +37,7 @@ define void @t2() nounwind ssp {
ret void
}
-declare i32 @foo2()
+declare dso_local i32 @foo2()
define void @t3() nounwind ssp {
; X86-LABEL: t3:
@@ -55,7 +55,7 @@ define void @t3() nounwind ssp {
ret void
}
-declare i32 @foo3()
+declare dso_local i32 @foo3()
define void @t4(void (i32)* nocapture %x) nounwind ssp {
; X86-LABEL: t4:
@@ -167,7 +167,7 @@ bb1:
ret i32 %t3
}
-declare i32 @bar(i32)
+declare dso_local i32 @bar(i32)
define i32 @t7(i32 %a, i32 %b, i32 %c) nounwind ssp {
; X86-LABEL: t7:
@@ -185,7 +185,7 @@ define i32 @t7(i32 %a, i32 %b, i32 %c) nounwind ssp {
ret i32 %t0
}
-declare i32 @bar2(i32, i32, i32)
+declare dso_local i32 @bar2(i32, i32, i32)
define signext i16 @t8() nounwind ssp {
; X86-LABEL: t8:
@@ -204,7 +204,7 @@ entry:
ret i16 %0
}
-declare signext i16 @bar3()
+declare dso_local signext i16 @bar3()
define signext i16 @t9(i32 (i32)* nocapture %x) nounwind ssp {
; X86-LABEL: t9:
@@ -252,7 +252,7 @@ entry:
unreachable
}
-declare i32 @foo4()
+declare dso_local i32 @foo4()
; In 32-bit mode, it's emitting a bunch of dead loads that are not being
; eliminated currently.
@@ -299,7 +299,7 @@ bb6:
ret i32 0
}
-declare i32 @foo5(i32, i32, i32, i32, i32)
+declare dso_local i32 @foo5(i32, i32, i32, i32, i32)
%struct.t = type { i32, i32, i32, i32, i32 }
@@ -345,7 +345,7 @@ bb2:
ret i32 0
}
-declare i32 @foo6(i32, i32, %struct.t* byval(%struct.t) align 4)
+declare dso_local i32 @foo6(i32, i32, %struct.t* byval(%struct.t) align 4)
; rdar://r7717598
%struct.ns = type { i32, i32 }
@@ -406,7 +406,7 @@ entry:
; rdar://6195379
; llvm can't do sibcall for this in 32-bit mode (yet).
-declare fastcc %struct.ns* @foo7(%struct.cp* byval(%struct.cp) align 4, i8 signext) nounwind ssp
+declare dso_local fastcc %struct.ns* @foo7(%struct.cp* byval(%struct.cp) align 4, i8 signext) nounwind ssp
%struct.__block_descriptor = type { i64, i64 }
%struct.__block_descriptor_withcopydispose = type { i64, i64, i8*, i8* }
@@ -483,7 +483,7 @@ define void @t15(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind {
ret void
}
-declare void @f(%struct.foo* noalias sret(%struct.foo)) nounwind
+declare dso_local void @f(%struct.foo* noalias sret(%struct.foo)) nounwind
define void @t16() nounwind ssp {
; X86-LABEL: t16:
@@ -506,7 +506,7 @@ entry:
ret void
}
-declare double @bar4()
+declare dso_local double @bar4()
; rdar://6283267
define void @t17() nounwind ssp {
@@ -528,7 +528,7 @@ entry:
ret void
}
-declare void @bar5(...)
+declare dso_local void @bar5(...)
; rdar://7774847
define void @t18() nounwind ssp {
@@ -554,7 +554,7 @@ entry:
ret void
}
-declare double @bar6(...)
+declare dso_local double @bar6(...)
define void @t19() alignstack(32) nounwind {
; X86-LABEL: t19:
@@ -621,7 +621,7 @@ entry:
ret double %0
}
-declare fastcc double @foo20(double) nounwind
+declare dso_local fastcc double @foo20(double) nounwind
; bug 28417
define fastcc void @t21_sret_to_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind {
@@ -1044,9 +1044,9 @@ define ccc void @t22_non_sret_to_sret(%struct.foo* %agg.result) nounwind {
ret void
}
-declare fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo)) nounwind
-declare fastcc void @t21_f_sret2(%struct.foo* noalias sret(%struct.foo), %struct.foo* noalias) nounwind
-declare fastcc void @t21_f_non_sret(%struct.foo*) nounwind
+declare dso_local fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo)) nounwind
+declare dso_local fastcc void @t21_f_sret2(%struct.foo* noalias sret(%struct.foo), %struct.foo* noalias) nounwind
+declare dso_local fastcc void @t21_f_non_sret(%struct.foo*) nounwind
declare ccc void @t22_f_sret(%struct.foo* noalias sret(%struct.foo)) nounwind
diff --git a/llvm/test/CodeGen/X86/sqrt-partial.ll b/llvm/test/CodeGen/X86/sqrt-partial.ll
index e10f5e1586ad..00fa2d4a96f1 100644
--- a/llvm/test/CodeGen/X86/sqrt-partial.ll
+++ b/llvm/test/CodeGen/X86/sqrt-partial.ll
@@ -104,6 +104,6 @@ define double @partial_dep_minsize(double %x, double %y) minsize {
ret double %t
}
-declare float @sqrtf(float)
-declare double @sqrt(double)
-declare double @llvm.sqrt.f64(double)
+declare dso_local float @sqrtf(float)
+declare dso_local double @sqrt(double)
+declare dso_local double @llvm.sqrt.f64(double)
diff --git a/llvm/test/CodeGen/X86/sse-fcopysign.ll b/llvm/test/CodeGen/X86/sse-fcopysign.ll
index c5b1fb7ff7e0..fc49538e80b7 100644
--- a/llvm/test/CodeGen/X86/sse-fcopysign.ll
+++ b/llvm/test/CodeGen/X86/sse-fcopysign.ll
@@ -53,8 +53,8 @@ define double @tst2(double %a, float %b, float %c) nounwind {
ret double %tmp
}
-declare float @copysignf(float, float)
-declare double @copysign(double, double)
+declare dso_local float @copysignf(float, float)
+declare dso_local double @copysign(double, double)
;
; LLVM Intrinsic
@@ -150,5 +150,5 @@ define double @cst2() nounwind {
ret double %tmp
}
-declare float @llvm.copysign.f32(float %Mag, float %Sgn)
-declare double @llvm.copysign.f64(double %Mag, double %Sgn)
+declare dso_local float @llvm.copysign.f32(float %Mag, float %Sgn)
+declare dso_local double @llvm.copysign.f64(double %Mag, double %Sgn)
diff --git a/llvm/test/CodeGen/X86/statepoint-vreg-details.ll b/llvm/test/CodeGen/X86/statepoint-vreg-details.ll
index 814ba3d03fee..5f6f9c7091e4 100644
--- a/llvm/test/CodeGen/X86/statepoint-vreg-details.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vreg-details.ll
@@ -10,15 +10,15 @@
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
-declare i1 @return_i1()
-declare void @func()
-declare void @consume(i32 addrspace(1)*)
-declare void @consume2(i32 addrspace(1)*, i32 addrspace(1)*)
-declare void @consume5(i32 addrspace(1)*, i32 addrspace(1)*, i32 addrspace(1)*, i32 addrspace(1)*, i32 addrspace(1)*)
-declare void @use1(i32 addrspace(1)*, i8 addrspace(1)*)
-declare i32* @fake_personality_function()
-declare i32 @foo(i32, i8 addrspace(1)*, i32, i32, i32)
-declare void @bar(i8 addrspace(1)*, i8 addrspace(1)*)
+declare dso_local i1 @return_i1()
+declare dso_local void @func()
+declare dso_local void @consume(i32 addrspace(1)*)
+declare dso_local void @consume2(i32 addrspace(1)*, i32 addrspace(1)*)
+declare dso_local void @consume5(i32 addrspace(1)*, i32 addrspace(1)*, i32 addrspace(1)*, i32 addrspace(1)*, i32 addrspace(1)*)
+declare dso_local void @use1(i32 addrspace(1)*, i8 addrspace(1)*)
+declare dso_local i32* @fake_personality_function()
+declare dso_local i32 @foo(i32, i8 addrspace(1)*, i32, i32, i32)
+declare dso_local void @bar(i8 addrspace(1)*, i8 addrspace(1)*)
; test most simple relocate
define i1 @test_relocate(i32 addrspace(1)* %a) gc "statepoint-example" {
@@ -387,11 +387,11 @@ entry:
declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i32, ...)
declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...)
-declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32)
-declare i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(token, i32, i32)
+declare dso_local i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32)
+declare dso_local i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(token, i32, i32)
declare <2 x i8 addrspace(1)*> @llvm.experimental.gc.relocate.v2p1i8(token, i32, i32)
-declare i1 @llvm.experimental.gc.result.i1(token)
-declare void @__llvm_deoptimize(i32)
+declare dso_local i1 @llvm.experimental.gc.result.i1(token)
+declare dso_local void @__llvm_deoptimize(i32)
declare token @llvm.experimental.gc.statepoint.p0f_isVoidi32f(i64 immarg, i32 immarg, void (i32)*, i32 immarg, i32 immarg, ...)
declare token @llvm.experimental.gc.statepoint.p0f_i32i32p1i8i32i32i32f(i64 immarg, i32 immarg, i32 (i32, i8 addrspace(1)*, i32, i32, i32)*, i32 immarg, i32 immarg, ...)
declare token @llvm.experimental.gc.statepoint.p0f_isVoidp1i8p1i8f(i64 immarg, i32 immarg, void (i8 addrspace(1)*, i8 addrspace(1)*)*, i32 immarg, i32 immarg, ...)
diff --git a/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll b/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
index eda51f2ab5be..bcfe8e8e363d 100644
--- a/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
@@ -4,7 +4,7 @@
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
-declare void @func()
+declare dso_local void @func()
define i32 @test_spill(
i32 addrspace(1)* %arg00, i32 addrspace(1)* %arg01, i32 addrspace(1)* %arg02, i32 addrspace(1)* %arg03, i32 addrspace(1)* %arg04, i32 addrspace(1)* %arg05,
@@ -194,7 +194,7 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32 immarg
declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 immarg, i32 immarg, void ()*, i32 immarg, i32 immarg, ...)
; Function Attrs: nounwind
-declare void @llvm.stackprotector(i8*, i8**) #1
+declare dso_local void @llvm.stackprotector(i8*, i8**) #1
attributes #0 = { nounwind readonly }
attributes #1 = { nounwind }
diff --git a/llvm/test/CodeGen/X86/tail-call-deref.ll b/llvm/test/CodeGen/X86/tail-call-deref.ll
index 5df7cf4da8eb..9a48adac187a 100644
--- a/llvm/test/CodeGen/X86/tail-call-deref.ll
+++ b/llvm/test/CodeGen/X86/tail-call-deref.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
-declare i8* @foo()
+declare dso_local i8* @foo()
define dereferenceable(8) i8* @test1() nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll b/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
index 77aa3adf0fc6..36232af5904f 100644
--- a/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
@@ -3,7 +3,7 @@
; Ensure that we don't duplicate a block with an "INLINEASM_BR" instruction
; during code gen.
-declare void @foo()
+declare dso_local void @foo()
define i8* @test1(i8** %arg1, i8* %arg2) {
; CHECK-LABEL: name: test1
diff --git a/llvm/test/CodeGen/X86/tail-opts.ll b/llvm/test/CodeGen/X86/tail-opts.ll
index e70ecf09f087..06fa22a6c395 100644
--- a/llvm/test/CodeGen/X86/tail-opts.ll
+++ b/llvm/test/CodeGen/X86/tail-opts.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -post-RA-scheduler=true | FileCheck %s
-declare void @bar(i32)
-declare void @car(i32)
-declare void @dar(i32)
-declare void @ear(i32)
-declare void @far(i32)
+declare dso_local void @bar(i32)
+declare dso_local void @car(i32)
+declare dso_local void @dar(i32)
+declare dso_local void @ear(i32)
+declare dso_local void @far(i32)
declare i1 @qux()
@GHJK = global i32 0
@@ -424,13 +424,13 @@ return:
ret void
}
-declare void @func()
+declare dso_local void @func()
; one - One instruction may be tail-duplicated even with optsize.
@XYZ = external dso_local global i32
-declare void @tail_call_me()
+declare dso_local void @tail_call_me()
define void @one(i32 %v) nounwind optsize {
; CHECK-LABEL: one:
@@ -728,7 +728,7 @@ for.end: ; preds = %entry
; out-of-line after the main return, so we should try to eliminate as many of
; them as possible.
-declare void @abort()
+declare dso_local void @abort()
define void @merge_aborts() {
; CHECK-LABEL: merge_aborts:
; CHECK: # %bb.0: # %entry
@@ -787,7 +787,7 @@ cont4:
; Use alternating abort functions so that the blocks we wish to merge are not
; layout successors during branch folding.
-declare void @alt_abort()
+declare dso_local void @alt_abort()
define void @merge_alternating_aborts() {
; CHECK-LABEL: merge_alternating_aborts:
diff --git a/llvm/test/CodeGen/X86/tailcall-assume.ll b/llvm/test/CodeGen/X86/tailcall-assume.ll
index 3baac9c41211..a40f75c172ff 100644
--- a/llvm/test/CodeGen/X86/tailcall-assume.ll
+++ b/llvm/test/CodeGen/X86/tailcall-assume.ll
@@ -10,6 +10,6 @@ define i8* @foo() {
ret i8* %1
}
-declare i8* @bar()
+declare dso_local i8* @bar()
declare void @llvm.assume(i1)
diff --git a/llvm/test/CodeGen/X86/tailcall-extract.ll b/llvm/test/CodeGen/X86/tailcall-extract.ll
index 0fd968e4734f..a910b5f1ddff 100644
--- a/llvm/test/CodeGen/X86/tailcall-extract.ll
+++ b/llvm/test/CodeGen/X86/tailcall-extract.ll
@@ -184,7 +184,7 @@ exit:
}
-declare { i8*, i64 } @foo(i64)
-declare { i8*, i64 } @bar(i64)
-declare { {i8*, i64}, i64 } @baz(i64)
-declare { {i8*, i64}, i64 } @qux(i64)
+declare dso_local { i8*, i64 } @foo(i64)
+declare dso_local { i8*, i64 } @bar(i64)
+declare dso_local { {i8*, i64}, i64 } @baz(i64)
+declare dso_local { {i8*, i64}, i64 } @qux(i64)
diff --git a/llvm/test/CodeGen/X86/tailcall-tailcc.ll b/llvm/test/CodeGen/X86/tailcall-tailcc.ll
index 5a427034a726..0b9e599d13fb 100644
--- a/llvm/test/CodeGen/X86/tailcall-tailcc.ll
+++ b/llvm/test/CodeGen/X86/tailcall-tailcc.ll
@@ -5,7 +5,7 @@
; With -tailcallopt, CodeGen guarantees a tail call optimization
; for all of these.
-declare tailcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
+declare dso_local tailcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
define tailcc i32 @tailcaller(i32 %in1, i32 %in2) nounwind {
; X64-LABEL: tailcaller:
@@ -30,7 +30,7 @@ entry:
ret i32 %tmp11
}
-declare tailcc i8* @alias_callee()
+declare dso_local tailcc i8* @alias_callee()
define tailcc noalias i8* @noalias_caller() nounwind {
; X64-LABEL: noalias_caller:
@@ -46,7 +46,7 @@ define tailcc noalias i8* @noalias_caller() nounwind {
ret i8* %p
}
-declare tailcc noalias i8* @noalias_callee()
+declare dso_local tailcc noalias i8* @noalias_callee()
define tailcc i8* @alias_caller() nounwind {
; X64-LABEL: alias_caller:
@@ -62,7 +62,7 @@ define tailcc i8* @alias_caller() nounwind {
ret i8* %p
}
-declare tailcc i32 @i32_callee()
+declare dso_local tailcc i32 @i32_callee()
define tailcc i32 @ret_undef() nounwind {
; X64-LABEL: ret_undef:
@@ -78,7 +78,7 @@ define tailcc i32 @ret_undef() nounwind {
ret i32 undef
}
-declare tailcc void @does_not_return()
+declare dso_local tailcc void @does_not_return()
define tailcc i32 @noret() nounwind {
; X64-LABEL: noret:
diff --git a/llvm/test/CodeGen/X86/win64_sibcall.ll b/llvm/test/CodeGen/X86/win64_sibcall.ll
index 5a65d34a4266..e3e8c1aeee9f 100644
--- a/llvm/test/CodeGen/X86/win64_sibcall.ll
+++ b/llvm/test/CodeGen/X86/win64_sibcall.ll
@@ -29,10 +29,10 @@ entry:
ret void
}
-declare void @C2(%Object addrspace(1)*, i32, %Object addrspace(1)*)
+declare dso_local void @C2(%Object addrspace(1)*, i32, %Object addrspace(1)*)
; Function Attrs: nounwind
-declare void @llvm.localescape(...) #0
+declare dso_local void @llvm.localescape(...) #0
attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/X86/xor-icmp.ll b/llvm/test/CodeGen/X86/xor-icmp.ll
index 95bc660dc014..bdad92e6cb2c 100644
--- a/llvm/test/CodeGen/X86/xor-icmp.ll
+++ b/llvm/test/CodeGen/X86/xor-icmp.ll
@@ -42,9 +42,9 @@ bb1: ; preds = %entry
ret i32 %6
}
-declare i32 @foo(...)
+declare dso_local i32 @foo(...)
-declare i32 @bar(...)
+declare dso_local i32 @bar(...)
define i32 @t2(i32 %x, i32 %y) nounwind ssp {
; X86-LABEL: t2:
diff --git a/llvm/test/DebugInfo/X86/live-debug-values-remove-range.ll b/llvm/test/DebugInfo/X86/live-debug-values-remove-range.ll
index 6fec3f8150ee..2d2d11cb704a 100644
--- a/llvm/test/DebugInfo/X86/live-debug-values-remove-range.ll
+++ b/llvm/test/DebugInfo/X86/live-debug-values-remove-range.ll
@@ -43,8 +43,8 @@
; CHECK: DBG_VALUE [[QUUXLOC]], $noreg, ![[QUUXVARNUM]]
; CHECK-NOT: DBG_VALUE $noreg
-declare i1 @booler()
-declare void @escape(i32)
+declare dso_local i1 @booler()
+declare dso_local void @escape(i32)
declare void @llvm.dbg.value(metadata, metadata, metadata)
@glob = global i32 0
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