[llvm-branch-commits] [llvm] f0659c0 - [X86] Support modifier @PLTOFF for R_X86_64_PLTOFF64
Fangrui Song via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Dec 1 12:09:10 PST 2020
Author: Fangrui Song
Date: 2020-12-01T08:39:01-08:00
New Revision: f0659c0673417582038aa4a3c13edbfa0abb6b9a
URL: https://github.com/llvm/llvm-project/commit/f0659c0673417582038aa4a3c13edbfa0abb6b9a
DIFF: https://github.com/llvm/llvm-project/commit/f0659c0673417582038aa4a3c13edbfa0abb6b9a.diff
LOG: [X86] Support modifier @PLTOFF for R_X86_64_PLTOFF64
`gcc -mcmodel=large` can emit @PLTOFF.
Reviewed By: grimar
Differential Revision: https://reviews.llvm.org/D92294
Added:
llvm/test/MC/X86/pltoff.s
Modified:
llvm/include/llvm/MC/MCExpr.h
llvm/lib/MC/MCExpr.cpp
llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCExpr.h b/llvm/include/llvm/MC/MCExpr.h
index a2c0aea464e4..3ffc845e75c0 100644
--- a/llvm/include/llvm/MC/MCExpr.h
+++ b/llvm/include/llvm/MC/MCExpr.h
@@ -224,6 +224,7 @@ class MCSymbolRefExpr : public MCExpr {
VK_WEAKREF, // The link between the symbols in .weakref foo, bar
VK_X86_ABS8,
+ VK_X86_PLTOFF,
VK_ARM_NONE,
VK_ARM_GOT_PREL,
diff --git a/llvm/lib/MC/MCExpr.cpp b/llvm/lib/MC/MCExpr.cpp
index 6f1ac656cec0..3b123a46d9dc 100644
--- a/llvm/lib/MC/MCExpr.cpp
+++ b/llvm/lib/MC/MCExpr.cpp
@@ -253,6 +253,7 @@ StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) {
case VK_SIZE: return "SIZE";
case VK_WEAKREF: return "WEAKREF";
case VK_X86_ABS8: return "ABS8";
+ case VK_X86_PLTOFF: return "PLTOFF";
case VK_ARM_NONE: return "none";
case VK_ARM_GOT_PREL: return "GOT_PREL";
case VK_ARM_TARGET1: return "target1";
@@ -410,6 +411,7 @@ MCSymbolRefExpr::getVariantKindForName(StringRef Name) {
.Case("secrel32", VK_SECREL)
.Case("size", VK_SIZE)
.Case("abs8", VK_X86_ABS8)
+ .Case("pltoff", VK_X86_PLTOFF)
.Case("l", VK_PPC_LO)
.Case("h", VK_PPC_HI)
.Case("ha", VK_PPC_HA)
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
index 292dd17e2f51..fa937d381613 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
@@ -94,6 +94,12 @@ static void checkIs32(MCContext &Ctx, SMLoc Loc, X86_64RelType Type) {
"32 bit reloc applied to a field with a
diff erent size");
}
+static void checkIs64(MCContext &Ctx, SMLoc Loc, X86_64RelType Type) {
+ if (Type != RT64_64)
+ Ctx.reportError(Loc,
+ "64 bit reloc applied to a field with a
diff erent size");
+}
+
static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
MCSymbolRefExpr::VariantKind Modifier,
X86_64RelType Type, bool IsPCRel,
@@ -212,6 +218,9 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
return ELF::R_X86_64_REX_GOTPCRELX;
}
llvm_unreachable("unexpected relocation type!");
+ case MCSymbolRefExpr::VK_X86_PLTOFF:
+ checkIs64(Ctx, Loc, Type);
+ return ELF::R_X86_64_PLTOFF64;
}
}
diff --git a/llvm/test/MC/X86/pltoff.s b/llvm/test/MC/X86/pltoff.s
new file mode 100644
index 000000000000..3dd79ed1f2a2
--- /dev/null
+++ b/llvm/test/MC/X86/pltoff.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc -triple=x86_64 %s | FileCheck %s --check-prefix=ASM
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %s -o %t
+# RUN: llvm-objdump -d -r %t | FileCheck %s --check-prefix=OBJ
+
+# RUN: not llvm-mc -filetype=obj -triple=x86_64 --defsym ERR=1 %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR
+
+# ASM: movabsq $puts at PLTOFF, %rax
+# OBJ: movabsq $0, %rax
+# OBJ-NEXT: 0000000000000002: R_X86_64_PLTOFF64 puts{{$}}
+
+movabsq $puts at PLTOFF, %rax
+
+.ifdef ERR
+# ERR: {{.*}}.s:[[#@LINE+1]]:1: error: 64 bit reloc applied to a field with a
diff erent size
+movl $puts at PLTOFF, %eax
+.endif
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